[PATCH] drm/amd/display: Enable fast plane updates on DCN3.2 and above when state->allow_modeset = true

[Aurabindo Pillai]

On 10/9/2023 6:36 PM, Mario Limonciello wrote:
> On 10/7/2023 00:41, Tianci Yin wrote:
>> From: tiancyin <tianci.yin at amd.com>
>>
>> [why]
>> When cursor moves across screen boarder, lag cursor observed,
>> since subvp settings need to sync up with vblank, that cause
>> cursor updates being delayed.
>>
>> [how]
>> Enable fast plane updates on DCN3.2 to fix it.
>>
>> Signed-off-by: tiancyin <tianci.yin at amd.com>
>> ---
>>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> index c21726bdbca2..25a0bd314fe5 100644
>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> @@ -9879,6 +9879,7 @@ static bool should_reset_plane(struct 
>> drm_atomic_state *state,
>>       struct drm_plane *other;
>>       struct drm_plane_state *old_other_state, *new_other_state;
>>       struct drm_crtc_state *new_crtc_state;
>> +    struct amdgpu_device *adev = drm_to_adev(plane->dev);
>>       int i;
>>       /*
>> @@ -9886,7 +9887,7 @@ static bool should_reset_plane(struct 
>> drm_atomic_state *state,
>>        * enough to determine when we need to reset all the planes on
>>        * the stream.
>>        */
>> -    if (state->allow_modeset)
>> +    if (adev->ip_versions[DCE_HWIP][0] < IP_VERSION(3, 2, 0) && 
>> state->allow_modeset)
>>           return true;
>>       /* Exit early if we know that we're adding or removing the 
>> plane. */
> 
> The comment associated with this says that this hack should go when 
> there are sufficient checks.
> 
> If there are enough checks for DCN3.2, isn't it likely there are enough 
> for earlier products too?  None of the rest of the code checks a 
> specific IP version.
> 
> Maybe the whole commit/block should go?
> 

The lag issue was only seen on DCN32 though. We could potentially try to 
enable it for all asic, but its very likely to create regressions. I'm 
okay with adding a TODO comment for now, stating that this needs to be 
enabled on other DCN version too. So just DCN32+ looks like a good start.

With the TODO comment added, the patch is:

Reviewed-by: Aurabindo Pillai <aurabindo.pillai at amd.com>