[PATCH 1/3] drm/amdgpu: ungate power gating when system suspend

[Wang, Yang(Kevin)]

[AMD Official Use Only - General]

Acked-by: Yang Wang <kevinyang.wang at amd.com>

Best Regards,
Kevin

-----Original Message-----
From: Feng, Kenneth <Kenneth.Feng at amd.com>
Sent: Tuesday, October 24, 2023 2:33 PM
To: Yuan, Perry <Perry.Yuan at amd.com>; Zhang, Yifan <Yifan1.Zhang at amd.com>; Limonciello, Mario <Mario.Limonciello at amd.com>
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Wang, Yang(Kevin) <KevinYang.Wang at amd.com>; amd-gfx at lists.freedesktop.org
Subject: RE: [PATCH 1/3] drm/amdgpu: ungate power gating when system suspend

[AMD Official Use Only - General]

Reviewed-by: Kenneth Feng <kenneth.feng at amd.com>


-----Original Message-----
From: Yuan, Perry <Perry.Yuan at amd.com>
Sent: Tuesday, October 24, 2023 10:33 AM
To: Zhang, Yifan <Yifan1.Zhang at amd.com>; Feng, Kenneth <Kenneth.Feng at amd.com>; Limonciello, Mario <Mario.Limonciello at amd.com>
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Wang, Yang(Kevin) <KevinYang.Wang at amd.com>; amd-gfx at lists.freedesktop.org
Subject: [PATCH 1/3] drm/amdgpu: ungate power gating when system suspend

[Why] During suspend, if GFX DPM is enabled and GFXOFF feature is enabled the system may get hung. So, it is suggested to disable GFXOFF feature during suspend and enable it after resume.

[How] Update the code to disable GFXOFF feature during suspend and enable it after resume.

[  311.396526] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [  311.396530] amdgpu 0000:03:00.0: amdgpu: Fail to disable dpm features!
[  311.396531] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <smu> failed -62

Signed-off-by: Perry Yuan <perry.yuan at amd.com>
Signed-off-by: Kun Liu <kun.liu2 at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index d9ccacd06fba..6399bc71c56d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3498,6 +3498,8 @@ static void gfx_v10_0_ring_invalidate_tlbs(struct amdgpu_ring *ring,  static void gfx_v10_0_update_spm_vmid_internal(struct amdgpu_device *adev,
                                               unsigned int vmid);

+static int gfx_v10_0_set_powergating_state(void *handle,
+                                         enum amd_powergating_state state);
 static void gfx10_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask)  {
        amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); @@ -7172,6 +7174,13 @@ static int gfx_v10_0_hw_fini(void *handle)
        amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
        amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);

+       /* WA added for Vangogh asic fixing the SMU suspend failure
+        * It needs to set power gating again during gfxoff control
+        * otherwise the gfxoff disallowing will be failed to set.
+        */
+       if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(10, 3, 1))
+               gfx_v10_0_set_powergating_state(handle, AMD_PG_STATE_UNGATE);
+
        if (!adev->no_hw_access) {
                if (amdgpu_async_gfx_ring) {
                        if (amdgpu_gfx_disable_kgq(adev, 0))
--
2.34.1