[PATCH] drm/amd/pm: call smu_cmn_get_smc_version in is_mode1_reset_supported.

[Deucher, Alexander]

[Public]

Acked-by: Alex Deucher <alexander.deucher at amd.com>
________________________________
From: Zhang, Yifan <Yifan1.Zhang at amd.com>
Sent: Tuesday, October 24, 2023 9:41 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Li, Candice <Candice.Li at amd.com>; Feng, Kenneth <Kenneth.Feng at amd.com>; Zhang, Yifan <Yifan1.Zhang at amd.com>
Subject: [PATCH] drm/amd/pm: call smu_cmn_get_smc_version in is_mode1_reset_supported.

is_mode1_reset_supported may be called before smu init, when smu_context
is unitialized in driver load/unload test. Call smu_cmn_get_smc_version
explicitly is_mode1_reset_supported.

Fixes: 5fe5098c64d9 ("drm/amd/pm: drop most smu_cmn_get_smc_version in smu")
Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 8 +++++++-
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c    | 8 +++++++-
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 090249b6422a..77c3d76c76a2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -2461,12 +2461,18 @@ static bool sienna_cichlid_is_mode1_reset_supported(struct smu_context *smu)
 {
         struct amdgpu_device *adev = smu->adev;
         uint32_t val;
+       uint32_t smu_version;
+       int ret;

         /**
          * SRIOV env will not support SMU mode1 reset
          * PM FW support mode1 reset from 58.26
          */
-       if (amdgpu_sriov_vf(adev) || (smu->smc_fw_version < 0x003a1a00))
+       ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+       if (ret)
+               return false;
+
+       if (amdgpu_sriov_vf(adev) || (smu_version < 0x003a1a00))
                 return false;

         /**
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index b1433973380b..648d5eafb27b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -2615,13 +2615,19 @@ static int smu_v13_0_0_baco_exit(struct smu_context *smu)
 static bool smu_v13_0_0_is_mode1_reset_supported(struct smu_context *smu)
 {
         struct amdgpu_device *adev = smu->adev;
+       u32 smu_version;
+       int ret;

         /* SRIOV does not support SMU mode1 reset */
         if (amdgpu_sriov_vf(adev))
                 return false;

         /* PMFW support is available since 78.41 */
-       if (smu->smc_fw_version < 0x004e2900)
+       ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+       if (ret)
+               return false;
+
+       if (smu_version < 0x004e2900)
                 return false;

         return true;
--
2.37.3

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