[PATCH] SWDEV-420310 - struct pm4_mes_runlist in amdgpu is conflict with spec struct pm4_mes_runlist is different with mes pm4 packet nv10 spec Modification: add last dword of the design of spec into struct pm4_mes_runlist

[Alex Deucher]

On Tue, Sep 5, 2023 at 10:05 PM Lin.Cao <lincao12 at amd.com> wrote:
>

Please fix up the title and the patch description.  Something like:

drm/amdgpu: update pm4_mes_runlist

struct pm4_mes_runlist in amdgpu is in conflict with the spec.  struct
pm4_mes_runlist is
different with mes pm4 packet nv10 spec.  Add last dword of the design
of spec into
struct pm4_mes_runlist.

Alex

> Signed-off-by: Lin.Cao <lincao12 at amd.com>
> Change-Id: I1322c010d1428b2c1df5080b72da94e90cf17fec
> ---
>  drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
> index 8b6b2bd5c148..d50feaf59b8a 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
> @@ -129,6 +129,18 @@ struct pm4_mes_runlist {
>                 uint32_t ordinal4;
>         };
>
> +       union
> +       {
> +               struct
> +               {
> +                       uint32_t level_1_static_queue_cnt:4;
> +                       uint32_t level_2_static_queue_cnt:4;
> +                       uint32_t level_3_static_queue_cnt:4;
> +                       uint32_t reserved4:20;
> +               } bitfields5;
> +               uint32_t ordinal5;
> +       };
> +
>  };
>  #endif
>
> --
> 2.25.1
>