[PATCH 10/28] drm/amd/display: Add DPIA Link Encoder Assignment Fix for DCN35
Rodrigo Siqueira
Rodrigo.Siqueira at amd.com
Thu Sep 14 02:00:03 UTC 2023
From: Mustapha Ghaddar <mghaddar at amd.com>
[HOW & WHY]
For DPIA we should have preferred DIG assignment based on DPIA
selected as per the ASIC design
Reviewed-by: George Shen <george.shen at amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo at amd.com>
Signed-off-by: Mustapha Ghaddar <mghaddar at amd.com>
---
.../drm/amd/display/dc/dcn35/dcn35_resource.c | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
index 60e7e09a577a..02480920a5b0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
@@ -863,6 +863,28 @@ static const struct dce_i2c_mask i2c_masks = {
I2C_COMMON_MASK_SH_LIST_DCN35(_MASK)
};
+/* ========================================================== */
+
+/*
+ * DPIA index | Preferred Encoder | Host Router
+ * 0 | C | 0
+ * 1 | First Available | 0
+ * 2 | D | 1
+ * 3 | First Available | 1
+ */
+/* ========================================================== */
+static const enum engine_id dpia_to_preferred_enc_id_table[] = {
+ ENGINE_ID_DIGC,
+ ENGINE_ID_DIGC,
+ ENGINE_ID_DIGD,
+ ENGINE_ID_DIGD
+};
+
+static enum engine_id dcn35_get_preferred_eng_id_dpia(unsigned int dpia_index)
+{
+ return dpia_to_preferred_enc_id_table[dpia_index];
+}
+
static struct dce_i2c_hw *dcn31_i2c_hw_create(
struct dc_context *ctx,
uint32_t inst)
@@ -1701,6 +1723,7 @@ static struct resource_funcs dcn35_res_pool_funcs = {
.update_bw_bounding_box = dcn35_update_bw_bounding_box_fpu,
.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
.get_panel_config_defaults = dcn35_get_panel_config_defaults,
+ .get_preferred_eng_id_dpia = dcn35_get_preferred_eng_id_dpia,
};
static bool dcn35_resource_construct(
--
2.40.1
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