[PATCH] drm/amdgpu: always use legacy tlb flush on cyan_skilfish

[Lang Yu]

On 09/14/ , Zhang, Yifan wrote:
> [Public]
> 
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Lang Yu
> Sent: Thursday, September 14, 2023 3:00 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Yu, Lang <Lang.Yu at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; stable at vger.kernel.org
> Subject: [PATCH] drm/amdgpu: always use legacy tlb flush on cyan_skilfish
> 
> cyan_skilfish has problems with other flush types.
> 
> Signed-off-by: Lang Yu <Lang.Yu at amd.com>
> Cc: <stable at vger.kernel.org> # v5.15+
> ---
>  drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index d3da13f4c80e..27504ac21653 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -236,7 +236,8 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,  {
>         bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(adev, vmhub);
>         struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];
> -       u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);
> +       u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid,
> +                     (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0);
>         u32 tmp;
>         /* Use register 17 for GART */
>         const unsigned int eng = 17;
> @@ -331,6 +332,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
> 
>         int r;
> 
> +       flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? : 0;
> Should be flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0; here ?
> +
>         /* flush hdp cache */
>         adev->hdp.funcs->flush_hdp(adev, NULL);
> 
> @@ -426,6 +429,8 @@ static int gmc_v10_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
>         struct amdgpu_ring *ring = &adev->gfx.kiq[0].ring;
>         struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];
> 
> +       flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? : 0;
> Should be flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0; here ?

Yes, thank you! Will fix it.

Regards,
Lang

>         if (amdgpu_emu_mode == 0 && ring->sched.ready) {
>                 spin_lock(&adev->gfx.kiq[0].ring_lock);
>                 /* 2 dwords flush + 8 dwords fence */
> --
> 2.25.1
>