[PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update

[Zhou1, Tao]

[AMD Official Use Only - General]

Thanks for catch it, will update the patch.

Tao

> -----Original Message-----
> From: Wang, Yang(Kevin) <KevinYang.Wang at amd.com>
> Sent: Tuesday, September 19, 2023 11:34 PM
> To: Zhou1, Tao <Tao.Zhou1 at amd.com>; amd-gfx at lists.freedesktop.org; Zhang,
> Hawking <Hawking.Zhang at amd.com>; Yang, Stanley <Stanley.Yang at amd.com>;
> Li, Candice <Candice.Li at amd.com>; Chai, Thomas <YiPeng.Chai at amd.com>
> Subject: RE: [PATCH 3/3] drm/amdgpu: change if condition for bad channel
> bitmap update
>
> [AMD Official Use Only - General]
>
> Hi Tao,
>
> Based on your description, I think you should use BITS_PER_TYPE() instead of
> sizeof(), right?
>
> Best Regards,
> Kevin
>
> -----Original Message-----
> From: Zhou1, Tao <Tao.Zhou1 at amd.com>
> Sent: Tuesday, September 19, 2023 6:10 PM
> To: amd-gfx at lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang at amd.com>;
> Yang, Stanley <Stanley.Yang at amd.com>; Li, Candice <Candice.Li at amd.com>;
> Wang, Yang(Kevin) <KevinYang.Wang at amd.com>; Chai, Thomas
> <YiPeng.Chai at amd.com>
> Cc: Zhou1, Tao <Tao.Zhou1 at amd.com>
> Subject: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap
> update
>
> The amdgpu_ras_eeprom_control.bad_channel_bitmap is u32 type, but the
> channel index could be larger than 32. For the ASICs whose channel number is
> more than 32, the amdgpu_dpm_send_hbm_bad_channel_flag
> interface is not supported, so we simply bypass channel bitmap update under this
> condition.
>
> Signed-off-by: Tao Zhou <tao.zhou1 at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> index 8ced4be784e0..1c4433f22f4b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> @@ -616,7 +616,8 @@ amdgpu_ras_eeprom_append_table(struct
> amdgpu_ras_eeprom_control *control,
>                 __encode_table_record_to_buf(control, &record[i], pp);
>
>                 /* update bad channel bitmap */
> -               if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
> +               if ((record[i].mem_channel < sizeof(control->bad_channel_bitmap)) &&
> +                   !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
>                         control->bad_channel_bitmap |= 1 << record[i].mem_channel;
>                         con->update_channel_flag = true;
>                 }
> @@ -969,7 +970,8 @@ int amdgpu_ras_eeprom_read(struct
> amdgpu_ras_eeprom_control *control,
>                 __decode_table_record_from_buf(control, &record[i], pp);
>
>                 /* update bad channel bitmap */
> -               if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
> +               if ((record[i].mem_channel < sizeof(control->bad_channel_bitmap)) &&
> +                   !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
>                         control->bad_channel_bitmap |= 1 << record[i].mem_channel;
>                         con->update_channel_flag = true;
>                 }
> --
> 2.35.1
>