[PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture

Christian König ckoenig.leichtzumerken at gmail.com
Fri Sep 22 10:07:34 UTC 2023


Am 21.09.23 um 16:12 schrieb Alex Deucher:
> The BOT register needs to be larger than the TOP register
> for this to be properly disabled.  The lower 22 bits
> of the BOT address are always 0 and the lower 22 bits of
> the TOP register are always 1 so you need to make
> the upper bits of BOT larger than the upper bits of BOT.
>
> Reviewed-by: Yang Wang <kevinyang.wang at amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
>   drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
>   drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +-
>   3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> index 5b837a65fad2..07579fa26fa3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> @@ -253,7 +253,7 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
>   	WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
>   	       adev->mem_scratch.gpu_addr >> 12);
>   	WREG32(mmMC_VM_AGP_BASE, 0);
> -	WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
> +	WREG32(mmMC_VM_AGP_TOP, 0);
>   	WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
>   
>   	if (gmc_v6_0_wait_for_idle((void *)adev))
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index 6a6929ac2748..e77e5593e1ab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -288,7 +288,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
>   	WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
>   	       adev->mem_scratch.gpu_addr >> 12);
>   	WREG32(mmMC_VM_AGP_BASE, 0);
> -	WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
> +	WREG32(mmMC_VM_AGP_TOP, 0);
>   	WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
>   	if (gmc_v7_0_wait_for_idle((void *)adev))
>   		dev_warn(adev->dev, "Wait for MC idle timedout !\n");
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index 5af235202513..6acf649469dd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -473,7 +473,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
>   	}
>   
>   	WREG32(mmMC_VM_AGP_BASE, 0);
> -	WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
> +	WREG32(mmMC_VM_AGP_TOP, 0);
>   	WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
>   	if (gmc_v8_0_wait_for_idle((void *)adev))
>   		dev_warn(adev->dev, "Wait for MC idle timedout !\n");



More information about the amd-gfx mailing list