[PATCH v2 1/2] drm/amd: Move `enum drm_amdgpu_ta_fw_type` to uapi

Mario Limonciello mario.limonciello at amd.com
Tue Sep 26 13:21:42 UTC 2023


Enum values used by the ioctl `AMDGPU_INFO_FW_VERSION`/`AMDGPU_INFO_FW_TA`
are not exported so clients need to keep their own copy of the definitions
while looking up firmware versions for the TA.

Move this to uapi instead.

Signed-off-by: Mario Limonciello <mario.limonciello at amd.com>
--
v1->v2:
 * Rename while moving (Alex)
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c   | 18 +++++++++---------
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 14 +++++++-------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 12 ------------
 include/uapi/drm/amdgpu_drm.h             | 12 ++++++++++++
 4 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 081bd28e2443..6eff7eb18322 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -311,32 +311,32 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,
 		break;
 	case AMDGPU_INFO_FW_TA:
 		switch (query_fw->index) {
-		case TA_FW_TYPE_PSP_XGMI:
+		case AMDGPU_TA_FW_TYPE_PSP_XGMI:
 			fw_info->ver = adev->psp.xgmi_context.context.bin_desc.fw_version;
 			fw_info->feature = adev->psp.xgmi_context.context
 						   .bin_desc.feature_version;
 			break;
-		case TA_FW_TYPE_PSP_RAS:
+		case AMDGPU_TA_FW_TYPE_PSP_RAS:
 			fw_info->ver = adev->psp.ras_context.context.bin_desc.fw_version;
 			fw_info->feature = adev->psp.ras_context.context
 						   .bin_desc.feature_version;
 			break;
-		case TA_FW_TYPE_PSP_HDCP:
+		case AMDGPU_TA_FW_TYPE_PSP_HDCP:
 			fw_info->ver = adev->psp.hdcp_context.context.bin_desc.fw_version;
 			fw_info->feature = adev->psp.hdcp_context.context
 						   .bin_desc.feature_version;
 			break;
-		case TA_FW_TYPE_PSP_DTM:
+		case AMDGPU_TA_FW_TYPE_PSP_DTM:
 			fw_info->ver = adev->psp.dtm_context.context.bin_desc.fw_version;
 			fw_info->feature = adev->psp.dtm_context.context
 						   .bin_desc.feature_version;
 			break;
-		case TA_FW_TYPE_PSP_RAP:
+		case AMDGPU_TA_FW_TYPE_PSP_RAP:
 			fw_info->ver = adev->psp.rap_context.context.bin_desc.fw_version;
 			fw_info->feature = adev->psp.rap_context.context
 						   .bin_desc.feature_version;
 			break;
-		case TA_FW_TYPE_PSP_SECUREDISPLAY:
+		case AMDGPU_TA_FW_TYPE_PSP_SECUREDISPLAY:
 			fw_info->ver = adev->psp.securedisplay_context.context.bin_desc.fw_version;
 			fw_info->feature =
 				adev->psp.securedisplay_context.context.bin_desc
@@ -1536,8 +1536,8 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused)
 	uint8_t smu_program, smu_major, smu_minor, smu_debug;
 	int ret, i;
 
-	static const char *ta_fw_name[TA_FW_TYPE_MAX_INDEX] = {
-#define TA_FW_NAME(type)[TA_FW_TYPE_PSP_##type] = #type
+	static const char *ta_fw_name[AMDGPU_TA_FW_TYPE_MAX_INDEX] = {
+#define TA_FW_NAME(type)[AMDGPU_TA_FW_TYPE_PSP_##type] = #type
 		TA_FW_NAME(XGMI),
 		TA_FW_NAME(RAS),
 		TA_FW_NAME(HDCP),
@@ -1689,7 +1689,7 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused)
 		   fw_info.feature, fw_info.ver);
 
 	query_fw.fw_type = AMDGPU_INFO_FW_TA;
-	for (i = TA_FW_TYPE_PSP_XGMI; i < TA_FW_TYPE_MAX_INDEX; i++) {
+	for (i = AMDGPU_TA_FW_TYPE_PSP_XGMI; i < AMDGPU_TA_FW_TYPE_MAX_INDEX; i++) {
 		query_fw.index = i;
 		ret = amdgpu_firmware_info(&fw_info, &query_fw, adev);
 		if (ret)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 72ee66db182c..bf9eb53cd4fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -3291,38 +3291,38 @@ static int parse_ta_bin_descriptor(struct psp_context *psp,
 			    le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
 
 	switch (desc->fw_type) {
-	case TA_FW_TYPE_PSP_ASD:
+	case AMDGPU_TA_FW_TYPE_PSP_ASD:
 		psp->asd_context.bin_desc.fw_version        = le32_to_cpu(desc->fw_version);
 		psp->asd_context.bin_desc.feature_version   = le32_to_cpu(desc->fw_version);
 		psp->asd_context.bin_desc.size_bytes        = le32_to_cpu(desc->size_bytes);
 		psp->asd_context.bin_desc.start_addr        = ucode_start_addr;
 		break;
-	case TA_FW_TYPE_PSP_XGMI:
+	case AMDGPU_TA_FW_TYPE_PSP_XGMI:
 		psp->xgmi_context.context.bin_desc.fw_version       = le32_to_cpu(desc->fw_version);
 		psp->xgmi_context.context.bin_desc.size_bytes       = le32_to_cpu(desc->size_bytes);
 		psp->xgmi_context.context.bin_desc.start_addr       = ucode_start_addr;
 		break;
-	case TA_FW_TYPE_PSP_RAS:
+	case AMDGPU_TA_FW_TYPE_PSP_RAS:
 		psp->ras_context.context.bin_desc.fw_version        = le32_to_cpu(desc->fw_version);
 		psp->ras_context.context.bin_desc.size_bytes        = le32_to_cpu(desc->size_bytes);
 		psp->ras_context.context.bin_desc.start_addr        = ucode_start_addr;
 		break;
-	case TA_FW_TYPE_PSP_HDCP:
+	case AMDGPU_TA_FW_TYPE_PSP_HDCP:
 		psp->hdcp_context.context.bin_desc.fw_version       = le32_to_cpu(desc->fw_version);
 		psp->hdcp_context.context.bin_desc.size_bytes       = le32_to_cpu(desc->size_bytes);
 		psp->hdcp_context.context.bin_desc.start_addr       = ucode_start_addr;
 		break;
-	case TA_FW_TYPE_PSP_DTM:
+	case AMDGPU_TA_FW_TYPE_PSP_DTM:
 		psp->dtm_context.context.bin_desc.fw_version       = le32_to_cpu(desc->fw_version);
 		psp->dtm_context.context.bin_desc.size_bytes       = le32_to_cpu(desc->size_bytes);
 		psp->dtm_context.context.bin_desc.start_addr       = ucode_start_addr;
 		break;
-	case TA_FW_TYPE_PSP_RAP:
+	case AMDGPU_TA_FW_TYPE_PSP_RAP:
 		psp->rap_context.context.bin_desc.fw_version       = le32_to_cpu(desc->fw_version);
 		psp->rap_context.context.bin_desc.size_bytes       = le32_to_cpu(desc->size_bytes);
 		psp->rap_context.context.bin_desc.start_addr       = ucode_start_addr;
 		break;
-	case TA_FW_TYPE_PSP_SECUREDISPLAY:
+	case AMDGPU_TA_FW_TYPE_PSP_SECUREDISPLAY:
 		psp->securedisplay_context.context.bin_desc.fw_version =
 			le32_to_cpu(desc->fw_version);
 		psp->securedisplay_context.context.bin_desc.size_bytes =
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index ae5fa61d2890..73a84af54d70 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -145,18 +145,6 @@ struct ta_firmware_header_v1_0 {
 	struct psp_fw_legacy_bin_desc securedisplay;
 };
 
-enum ta_fw_type {
-	TA_FW_TYPE_UNKOWN,
-	TA_FW_TYPE_PSP_ASD,
-	TA_FW_TYPE_PSP_XGMI,
-	TA_FW_TYPE_PSP_RAS,
-	TA_FW_TYPE_PSP_HDCP,
-	TA_FW_TYPE_PSP_DTM,
-	TA_FW_TYPE_PSP_RAP,
-	TA_FW_TYPE_PSP_SECUREDISPLAY,
-	TA_FW_TYPE_MAX_INDEX,
-};
-
 /* version_major=2, version_minor=0 */
 struct ta_firmware_header_v2_0 {
 	struct common_firmware_header header;
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 984fc16577ca..f982b167feeb 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -912,6 +912,18 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
 #define AMDGPU_INFO_MMR_SH_INDEX_SHIFT	8
 #define AMDGPU_INFO_MMR_SH_INDEX_MASK	0xff
 
+enum drm_amdgpu_ta_fw_type {
+	AMDGPU_TA_FW_TYPE_UNKOWN,
+	AMDGPU_TA_FW_TYPE_PSP_ASD,
+	AMDGPU_TA_FW_TYPE_PSP_XGMI,
+	AMDGPU_TA_FW_TYPE_PSP_RAS,
+	AMDGPU_TA_FW_TYPE_PSP_HDCP,
+	AMDGPU_TA_FW_TYPE_PSP_DTM,
+	AMDGPU_TA_FW_TYPE_PSP_RAP,
+	AMDGPU_TA_FW_TYPE_PSP_SECUREDISPLAY,
+	AMDGPU_TA_FW_TYPE_MAX_INDEX,
+};
+
 struct drm_amdgpu_query_fw {
 	/** AMDGPU_INFO_FW_* */
 	__u32 fw_type;
-- 
2.34.1



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