[PATCH v2] drm/amd/display: enable S/G display for for recent APUs by default

[Alex Deucher]

On Thu, Sep 28, 2023 at 5:11 AM Yifan Zhang <yifan1.zhang at amd.com> wrote:
>
> With S/G display becomes stable, enable S/G display for recent APUs
> by default rather than white list.
>
> v2: explicitly disable sg on pre-CZ chips (Alex)
>
> Co-authored-by: Alex Deucher <alexander.deucher at amd.com>
> Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 47 ++++++-------------
>  1 file changed, 14 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 8e5dfdee22e6..8963d9c251f3 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1627,41 +1627,22 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>                 break;
>         }
>
> -       switch (adev->asic_type) {
> -       case CHIP_CARRIZO:
> -       case CHIP_STONEY:
> -               init_data.flags.gpu_vm_support = true;
> -               break;
> -       default:
> -               switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
> -               case IP_VERSION(1, 0, 0):
> -               case IP_VERSION(1, 0, 1):
> -                       /* enable S/G on PCO and RV2 */
> -                       if ((adev->apu_flags & AMD_APU_IS_RAVEN2) ||
> -                           (adev->apu_flags & AMD_APU_IS_PICASSO))
> -                               init_data.flags.gpu_vm_support = true;
> -                       break;
> -               case IP_VERSION(2, 1, 0):
> -               case IP_VERSION(3, 0, 1):
> -               case IP_VERSION(3, 1, 2):
> -               case IP_VERSION(3, 1, 3):
> -               case IP_VERSION(3, 1, 4):
> -               case IP_VERSION(3, 1, 5):
> -               case IP_VERSION(3, 1, 6):
> -               case IP_VERSION(3, 5, 0):
> -                       init_data.flags.gpu_vm_support = true;
> -                       break;
> -               default:
> -                       break;
> -               }
> -               break;
> -       }
> -       if (init_data.flags.gpu_vm_support &&
> -           (amdgpu_sg_display == 0))
> +       /* APU support S/G display by default except:
> +        * ASICs before Carrizo,
> +        * RAVEN1 (Users repored stability issue)
> +        */
> +
> +       if (adev->asic_type < CHIP_CARRIZO)
>                 init_data.flags.gpu_vm_support = false;
> +       else if (adev->asic_type == CHIP_RAVEN) {
> +               if (adev->apu_flags & AMD_APU_IS_RAVEN)
> +                       init_data.flags.gpu_vm_support = false;
> +               else
> +                       init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0);
> +       } else
> +               init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0) && (adev->flags & AMD_IS_APU);
>

per kernel coding style, if any clause has parens, every clause should
have parens.  With that fixed,
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> -       if (init_data.flags.gpu_vm_support)
> -               adev->mode_info.gpu_vm_support = true;
> +       init_data.flags.gpu_vm_support = adev->mode_info.gpu_vm_support;
>
>         if (amdgpu_dc_feature_mask & DC_FBC_MASK)
>                 init_data.flags.fbc_support = true;
> --
> 2.37.3
>