[PATCH 1/2] drm/amd/pm: Report uclk and sclk limit
Lazar, Lijo
lijo.lazar at amd.com
Tue Apr 2 10:35:43 UTC 2024
On 4/2/2024 4:00 PM, Lazar, Lijo wrote:
>
>
> On 4/2/2024 3:52 PM, Asad Kamal wrote:
>> Report max set uclk and sclk for smu_v_13_0_6
>>
>
> You may rephrase as
>
> "Use OD (pp_od_clk_voltage) interface to report current limits, default
> or those set by user, for SCLK and UCLK."
>
With the update above -
Reviewed-by: Lijo Lazar <lijo.lazar at amd.com>
Thanks,
Lijo
> Thanks,
> Lijo
>
>> Signed-off-by: Asad Kamal <asad.kamal at amd.com>
>> ---
>> .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 14 ++++++++++----
>> 1 file changed, 10 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
>> index 575292314f57..f81096bfbf2c 100644
>> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
>> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
>> @@ -1010,8 +1010,11 @@ static int smu_v13_0_6_print_clk_levels(struct smu_context *smu,
>>
>> switch (type) {
>> case SMU_OD_SCLK:
>> - size += sysfs_emit_at(buf, size, "%s:\n", "GFXCLK");
>> - fallthrough;
>> + size += sysfs_emit_at(buf, size, "%s:\n", "OD_SCLK");
>> + size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMhz\n",
>> + pstate_table->gfxclk_pstate.curr.min,
>> + pstate_table->gfxclk_pstate.curr.max);
>> + break;
>> case SMU_SCLK:
>> ret = smu_v13_0_6_get_current_clk_freq_by_table(smu, SMU_GFXCLK,
>> &now);
>> @@ -1052,8 +1055,11 @@ static int smu_v13_0_6_print_clk_levels(struct smu_context *smu,
>> break;
>>
>> case SMU_OD_MCLK:
>> - size += sysfs_emit_at(buf, size, "%s:\n", "MCLK");
>> - fallthrough;
>> + size += sysfs_emit_at(buf, size, "%s:\n", "OD_MCLK");
>> + size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMhz\n",
>> + pstate_table->uclk_pstate.curr.min,
>> + pstate_table->uclk_pstate.curr.max);
>> + break;
>> case SMU_MCLK:
>> ret = smu_v13_0_6_get_current_clk_freq_by_table(smu, SMU_UCLK,
>> &now);
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