[PATCH 1/2] drm/amdgpu: IB size alignment on VCN5
Liu, Leo
Leo.Liu at amd.com
Wed Apr 17 13:17:14 UTC 2024
[AMD Official Use Only - General]
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
> Sonny Jiang
> Sent: Monday, April 15, 2024 5:25 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Jiang, Sonny <Sonny.Jiang at amd.com>; Jiang, Sonny
> <Sonny.Jiang at amd.com>
> Subject: [PATCH 1/2] drm/amdgpu: IB size alignment on VCN5
>
> From: Sonny Jiang <sonjiang at amd.com>
>
> VCN5 IB size alignment adjusted.
>
> Signed-off-by: Sonny Jiang <sonny.jiang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 5d1b084eb631..94ae14e0989c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -509,7 +509,7 @@ static int amdgpu_hw_ip_info(struct amdgpu_device
> *adev,
> ++num_rings;
> }
> ib_start_alignment = 256;
> - ib_size_alignment = 4;
> + ib_size_alignment = 64;
We don't want these impact on previous HW if that is really required.
Regards,
Leo
> break;
> case AMDGPU_HW_IP_VCN_JPEG:
> type = (amdgpu_device_ip_get_ip_block(adev,
> AMD_IP_BLOCK_TYPE_JPEG)) ?
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index bb85772b1374..7d176046498f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -731,7 +731,7 @@ static int amdgpu_vcn_dec_sw_send_msg(struct
> amdgpu_ring *ring,
> int i, r;
>
> if (sq)
> - ib_size_dw += 8;
> + ib_size_dw += 16;
>
> r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL,
> ib_size_dw * 4,
> AMDGPU_IB_POOL_DIRECT, @@ -861,7 +861,7 @@ static int
> amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
> int i, r;
>
> if (sq)
> - ib_size_dw += 8;
> + ib_size_dw += 16;
>
> r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL,
> ib_size_dw * 4,
> AMDGPU_IB_POOL_DIRECT, @@ -928,7 +928,7 @@ static int
> amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
> int i, r;
>
> if (sq)
> - ib_size_dw += 8;
> + ib_size_dw += 16;
>
> r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL,
> ib_size_dw * 4,
> AMDGPU_IB_POOL_DIRECT,
> --
> 2.43.2
More information about the amd-gfx
mailing list