[PATCH 00/37] DC Patches April 22, 2024

Aurabindo Pillai aurabindo.pillai at amd.com
Mon Apr 22 15:27:09 UTC 2024


    Summary:
    
    * Changes across DSC, MST, DMCUB, Panel Replay and misc fixes.
    * Fixes to cursor programming sequence
    * Add some missing register defs
    * Formatting/Sytle fixes

==========

Anthony Koo (1):
  drm/amd/display: [FW Promotion] Release 0.0.214.0

Aric Cyr (1):
  drm/amd/display: 3.2.282

Cruise (1):
  drm/amd/display: Disable error correction if it's not supported

Dennis Chan (1):
  drm/amd/display: Fix Replay Desync Error Test

Dmytro Laktyushkin (1):
  drm/amd/display: Increase SAT_UPDATE_PENDING timeout

Ethan Bitnun (1):
  drm/amd/display: Block FPO According to Luminance Delta

Gabe Teeger (1):
  drm/amd/display: Atom Integrated System Info v2_2 for DCN35

George Shen (2):
  drm/amd/display: Handle Y carry-over in VCP X.Y calculation
  drm/amd/display: Skip SST ACT polling when sink_count is 0

Harry Wentland (2):
  drm/amd/display: Separate setting and programming of cursor
  drm/amd/display: Set cursor attributes before position

Hersen Wu (1):
  drm/amd/display: Fix incorrect DSC instance for MST

Ilya Bakoulin (1):
  drm/amd/display: Add condition for dp_set_dsc_config call

Joshua Aberback (1):
  Revert "drm/amd/display: Fix incorrect pointer assignment"

Meenakshikumar Somasundaram (1):
  drm/amd/display: Allocate zero bw after bw alloc enable

Michael Strauss (1):
  drm/amd/display: Add delay to improve LTTPR UHBR interop

Natanel Roizenman (1):
  drm/amd/display: Add null check in resource_log_pipe_topology_update

Nicholas Kazlauskas (1):
  drm/amd/display: Force flush after write to IPS driver signals

Rodrigo Siqueira (13):
  drm/amd/display: Add missing debug registers for DCN2/3/3.1
  drm/amd/display: Add missing dwb registers
  drm/amd/display: Add TMDS DC balancer control
  drm/amd/display: Add some missing HDMI registers for DCN3x
  drm/amd/display: Clean up code in DC
  drm/amd/display: Adjust registers sequence in the DIO list
  drm/amd/display: Code style adjustments
  drm/amd/display: Add some HDCP registers DCN35 list
  drm/amd/display: Update comments in DC
  drm/amd/display: Ensure that dmcub support flag is set for DCN20
  drm/amd/display: Add missing IRQ types
  drm/amd/display: Drop unnecessary semicolon
  drm/amd/display: Replace uint8_t with u8 for
    dp_hdmi_dongle_signature_str

Sung Joon Kim (3):
  drm/amd/display: Reuse the modified power sequence
  drm/amd/display: Fix recout calculation for stereo side-by-side
  drm/amd/display: Update dcn351 debug flags and function pointers

Sung-huai Wang (1):
  drm/amd/display: Handle HPD_IRQ for internal link

Swapnil Patel (1):
  drm/amd/display: Add dtbclk access to dcn315

yi-lchen (1):
  drm/amd/display: Keep VBios pixel rate div setting util next mode set

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   2 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |  48 ++-
 .../amd/display/amdgpu_dm/amdgpu_dm_plane.c   |   6 +-
 .../drm/amd/display/dc/bios/bios_parser2.c    |   1 +
 .../dc/clk_mgr/dcn315/dcn315_clk_mgr.c        |   8 +
 .../gpu/drm/amd/display/dc/core/dc_resource.c |  11 +
 .../gpu/drm/amd/display/dc/core/dc_state.c    |  10 +-
 .../gpu/drm/amd/display/dc/core/dc_stream.c   | 315 ++++++++++++++++--
 drivers/gpu/drm/amd/display/dc/dc.h           |   3 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |   2 +
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h  |   1 +
 drivers/gpu/drm/amd/display/dc/dc_stream.h    |  22 ++
 .../gpu/drm/amd/display/dc/dc_stream_priv.h   |  24 ++
 drivers/gpu/drm/amd/display/dc/dc_types.h     |   1 +
 .../drm/amd/display/dc/dce/dce_transform.h    |   1 -
 .../amd/display/dc/dcn20/dcn20_link_encoder.h |   5 +-
 .../drm/amd/display/dc/dcn201/dcn201_opp.h    |   3 +-
 .../gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h |   3 +
 .../display/dc/dcn30/dcn30_dio_link_encoder.h |   3 +-
 .../gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h  |  14 +-
 .../gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h |   6 +
 .../display/dc/dcn31/dcn31_dio_link_encoder.h |   2 +
 .../dc/dcn31/dcn31_hpo_dp_link_encoder.c      |   8 +-
 .../drm/amd/display/dc/dcn314/dcn314_dccg.c   |  12 +-
 .../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c |  13 +-
 .../display/dc/dcn32/dcn32_dio_link_encoder.c |   6 +-
 .../display/dc/dcn32/dcn32_dio_link_encoder.h |  10 +-
 .../dc/dcn32/dcn32_dio_stream_encoder.c       |  40 +--
 .../dc/dcn32/dcn32_dio_stream_encoder.h       |   5 +-
 .../display/dc/dcn32/dcn32_resource_helpers.c |   9 +-
 .../dc/dcn321/dcn321_dio_link_encoder.c       |   8 +-
 .../gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c |   8 +-
 .../display/dc/dcn35/dcn35_dio_link_encoder.h |  12 +-
 .../dc/dcn35/dcn35_dio_stream_encoder.c       |  36 +-
 drivers/gpu/drm/amd/display/dc/dm_helpers.h   |   3 +-
 .../drm/amd/display/dc/dml/dcn10/dcn10_fpu.h  |   2 +-
 .../amd/display/dc/dpp/dcn201/dcn201_dpp.c    |  13 +-
 .../dc/gpio/dcn21/hw_translate_dcn21.c        |   2 +-
 .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  24 +-
 .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c   |   2 +-
 .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c   |  23 +-
 .../amd/display/dc/hwss/dcn30/dcn30_hwseq.c   |   2 +-
 .../amd/display/dc/hwss/dcn314/dcn314_hwseq.c |  23 ++
 .../amd/display/dc/hwss/dcn314/dcn314_hwseq.h |   4 +
 .../amd/display/dc/hwss/dcn314/dcn314_init.c  |   1 +
 .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c   |  44 ++-
 .../amd/display/dc/hwss/dcn32/dcn32_hwseq.h   |   4 +
 .../amd/display/dc/hwss/dcn32/dcn32_init.c    |   1 +
 .../amd/display/dc/hwss/dcn35/dcn35_init.c    |   1 +
 .../amd/display/dc/hwss/dcn351/dcn351_init.c  |  10 +-
 .../display/dc/hwss/hw_sequencer_private.h    |   3 +
 .../gpu/drm/amd/display/dc/inc/core_types.h   |   7 +
 drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h  |   5 +
 .../drm/amd/display/dc/inc/hw/link_encoder.h  |   3 +-
 .../amd/display/dc/inc/hw/stream_encoder.h    |   1 +
 drivers/gpu/drm/amd/display/dc/irq_types.h    |   8 +
 .../link_hwss_hpo_fixed_vs_pe_retimer_dp.c    |   5 +
 .../drm/amd/display/dc/link/link_detection.c  |   2 +-
 .../gpu/drm/amd/display/dc/link/link_dpms.c   |  22 +-
 .../dc/link/protocols/link_dp_dpia_bw.c       |  10 +-
 .../dc/link/protocols/link_dp_irq_handler.c   |  25 +-
 .../display/dc/link/protocols/link_dp_phy.c   |  47 ++-
 .../dc/resource/dcn20/dcn20_resource.c        |  13 +-
 .../dc/resource/dcn30/dcn30_resource.c        |   2 +-
 .../dc/resource/dcn351/dcn351_resource.c      |   4 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |   2 +-
 .../include/asic_reg/dcn/dcn_3_0_0_offset.h   |   4 +
 .../include/asic_reg/dcn/dcn_3_0_0_sh_mask.h  |   5 +
 .../include/asic_reg/dcn/dcn_3_1_5_offset.h   |   4 +
 .../include/asic_reg/dcn/dcn_3_1_5_sh_mask.h  |  10 +
 .../include/asic_reg/dpcs/dpcs_3_0_0_offset.h |  24 ++
 .../asic_reg/dpcs/dpcs_3_0_0_sh_mask.h        |   4 +-
 72 files changed, 763 insertions(+), 264 deletions(-)

-- 
2.44.0



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