[PATCH 3/3] drm/amd/pm: fix the uninitialized scalar variable warning

[Huang, Tim]

[AMD Official Use Only - General]

> -----Original Message-----
> From: Jesse Zhang <jesse.zhang at amd.com>
> Sent: Friday, April 26, 2024 3:29 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian
> <Christian.Koenig at amd.com>; Huang, Tim <Tim.Huang at amd.com>; Zhang,
> Jesse(Jie) <Jesse.Zhang at amd.com>; Zhang, Jesse(Jie)
> <Jesse.Zhang at amd.com>
> Subject: [PATCH 3/3] drm/amd/pm: fix the uninitialized scalar variable
> warning
>
> Fix warning for using uninitialized values ​​sclk_mask, mck_mask and
> soc_mask.
>
> Signed-off-by: Jesse Zhang <Jesse.Zhang at amd.com>
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> index 8908bbb3ff1f..10f673b651a0 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> @@ -932,7 +932,7 @@ static int renoir_set_performance_level(struct
> smu_context *smu,
>                                       enum amd_dpm_forced_level level)
>  {
>       int ret = 0;
> -     uint32_t sclk_mask, mclk_mask, soc_mask;
> +     uint32_t sclk_mask, mclk_mask, soc_mask = 0;

Hi Jesse,

We should not need to set default here. How about set the correct mask in the
renoir_get_profiling_clk_mask according to the profile.

Tim
>
>       switch (level) {
>       case AMD_DPM_FORCED_LEVEL_HIGH:
> @@ -1018,8 +1018,10 @@ static int renoir_set_performance_level(struct
> smu_context *smu,
>                                                   &soc_mask);
>               if (ret)
>                       return ret;
> -             renoir_force_clk_levels(smu, SMU_SCLK, 1 << sclk_mask);
> -             renoir_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask);
> +             if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK)
> +                     renoir_force_clk_levels(smu, SMU_SCLK, 1 <<
> sclk_mask);
> +             else
> +                     renoir_force_clk_levels(smu, SMU_MCLK, 1 <<
> mclk_mask);
We should need to set both the clock levels here, just need to get the correct mask before setting them.

Tim
>               renoir_force_clk_levels(smu, SMU_SOCCLK, 1 << soc_mask);
>               break;
>       case AMD_DPM_FORCED_LEVEL_PROFILE_PEAK:
> --
> 2.25.1