[PATCH 00/24] DC Patches Aug 12 2024
Tom Chung
chiahsuan.chung at amd.com
Wed Aug 7 07:55:22 UTC 2024
- Fix some cursor issue
- Fix print format specifiers in DC_LOG_IPS
- Fix minor coding errors in dml21 phase 5
- Improve FAM control for DCN401
- Add null pointer checks for some code
- Refactor 3DLUT for non-DMA
- Optimize vstartup position for AS-SDP
- Update to using new dccg callbacks
- Enable otg synchronization logic for DCN321
- Disable DCN401 UCLK P-State support on full updates
Cc: Daniel Wheeler <daniel.wheeler at amd.com>
Alex Hung (1):
drm/amd/display: Check null pointers before using dc->clk_mgr
Aurabindo Pillai (1):
drm/amd/display: Add more logging for MALL static screen
Austin Zheng (1):
drm/amd/display: Unlock Pipes Based On DET Allocation
Charlene Liu (1):
drm/amd/display: remove redundant msg to pmfw at boot/resume
Dillon Varone (4):
drm/amd/display: Reduce redundant minimal transitions due to SubVP
drm/amd/display: Disable DCN401 UCLK P-State support on full updates
drm/amd/display: Perform outstanding programming on full updates
drm/amd/display: Set max VTotal cap for dcn401
Hansen Dsouza (1):
drm/amd/display: Update to using new dccg callbacks
Loan Chen (1):
drm/amd/display: Enable otg synchronization logic for DCN321
Martin Leung (1):
drm/amd/display: Promote DAL to 3.2.296
Melissa Wen (1):
drm/amd/display: fix cursor offset on rotation 180
Muhammad Ahmed (1):
drm/amd/display: guard otg disable w/a for test
Relja Vojvodic (1):
drm/amd/display: 3DLUT non-DMA refactor
Robin Chen (1):
drm/amd/display: Optimize vstartup position for AS-SDP
Rodrigo Siqueira (5):
drm/amd/display: Check null pointer before try to access it
drm/amd/display: Remove unused field
drm/amd/display: Improve FAM control for DCN401
drm/amd/display: Adjust cursor position
drm/amd/display: Remove unnecessary call to REG_SEQ_SUBMIT|WAIT_DONE
Roman Li (1):
drm/amd/display: Fix print format specifiers in DC_LOG_IPS
Wayne Lin (1):
drm/amd/display: Check null pointer before try to access it
Wenjing Liu (2):
drm/amd/display: fix minor coding errors where dml21 phase 5 uses
wrong variables
drm/amd/display: apply vmin optimization even if it doesn't reach vmin
level
.../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 3 +
drivers/gpu/drm/amd/display/dc/core/dc.c | 124 +------------
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 123 +++++++++++++
.../gpu/drm/amd/display/dc/core/dc_resource.c | 28 +++
drivers/gpu/drm/amd/display/dc/dc.h | 4 +-
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 26 +--
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c | 4 +-
.../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 3 +-
.../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 14 +-
.../dc/dml2/dml21/src/dml2_top/dml_top.c | 17 +-
.../amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c | 3 -
.../display/dc/hubbub/dcn401/dcn401_hubbub.c | 23 +++
.../amd/display/dc/hwss/dce110/dce110_hwseq.c | 7 +-
.../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 4 +-
.../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 17 +-
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 48 ++++-
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.h | 4 +
.../amd/display/dc/hwss/dcn32/dcn32_init.c | 2 +-
.../amd/display/dc/hwss/dcn35/dcn35_init.c | 1 +
.../amd/display/dc/hwss/dcn351/dcn351_init.c | 1 +
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 171 ++++++++++++++----
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 3 +
.../amd/display/dc/hwss/dcn401/dcn401_init.c | 5 +-
.../drm/amd/display/dc/hwss/hw_sequencer.h | 17 ++
.../gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 1 +
drivers/gpu/drm/amd/display/dc/inc/resource.h | 5 +
.../dc/resource/dcn321/dcn321_resource.c | 3 +
.../dc/resource/dcn401/dcn401_resource.c | 1 +
.../drm/amd/display/include/logger_types.h | 1 +
29 files changed, 460 insertions(+), 203 deletions(-)
--
2.34.1
More information about the amd-gfx
mailing list