[PATCH 00/13] DC Patches August 15, 2024

Fri Aug 16 18:47:02 UTC 2024

[Public]

Hi all,

This week this patchset was tested on the following systems:
        * Lenovo ThinkBook T13s Gen4 with AMD Ryzen 5 6600U
        * MSI Gaming X Trio RX 6800
        * Gigabyte Gaming OC RX 7900 XTX

These systems were tested on the following display/connection types:
        * eDP, (1080p 60hz [5650U]) (1920x1200 60hz [6600U]) (2560x1600 120hz[6600U])
        * DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz, 4k 240hz [Includes USB-C to DP/HDMI adapters])
        * Thunderbolt (LG Ultrafine 5k)
        * MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60Hz displays)
        * DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60 displays, and HP Hook G2 with 1 4k60 display)
        * USB 4 (Kensington SD5700T and 1x 4k 60Hz display)
        * PCON (Club3D CAC-1085 and 1x 4k 144Hz display [at 4k 120HZ, as that is the max the adapter supports])

The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to):
        * Changing display configurations and settings
        * Benchmark testing
        * Feature testing (Freesync, etc.)

Automated testing includes (but is not limited to):
        * Script testing (scripts to automate some of the manual checks)
        * IGT testing

The patchset consists of the amd-staging-drm-next branch (Head commit - 982c225d4768ee1cbfb50c56b5560edca758dbfc -> drm/amdkfd: Add node_id to location_id generically) with new patches added on top of it.

Tested on Ubuntu 24.04.1, on Wayland and X11, using KDE Plasma and Gnome.

Tested-by: Daniel Wheeler <daniel.wheeler at amd.com>

Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com

-----Original Message-----
From: Roman.Li at amd.com <Roman.Li at amd.com>
Sent: Thursday, August 15, 2024 6:45 PM
To: amd-gfx at lists.freedesktop.org
Cc: Wentland, Harry <Harry.Wentland at amd.com>; Li, Sun peng (Leo) <Sunpeng.Li at amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>; Pillai, Aurabindo <Aurabindo.Pillai at amd.com>; Li, Roman <Roman.Li at amd.com>; Lin, Wayne <Wayne.Lin at amd.com>; Gutierrez, Agustin <Agustin.Gutierrez at amd.com>; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung at amd.com>; Zuo, Jerry <Jerry.Zuo at amd.com>; Mohamed, Zaeem <Zaeem.Mohamed at amd.com>; Li, Roman <Roman.Li at amd.com>; Wheeler, Daniel <Daniel.Wheeler at amd.com>
Subject: [PATCH 00/13] DC Patches August 15, 2024

From: Roman Li <Roman.Li at amd.com>

Cc: Daniel Wheeler <daniel.wheeler at amd.com>

Aurabindo Pillai (1):
  drm/amd/display: remove an extraneous call for checking dchub clock

Austin Zheng (1):
  drm/amd/display: DML2.1 Reintegration for Various Fixes

Fangzhi Zuo (1):
  drm/amd/display: Fix a typo in revert commit

Hansen Dsouza (1):
  Revert "drm/amd/display: Update to using new dccg callbacks"

Ilya Bakoulin (1):
  drm/amd/display: Fix construct_phy with MXM connector

Martin Leung (1):
  drm/amd/display: Promote DC to 3.2.297

Michael Strauss (2):
  drm/amd/display: Update HPO I/O When Handling Link Retrain Automation
    Request
  drm/amd/display: Allow UHBR Interop With eDP Supported Link Rates
    Table

Nevenko Stupar (1):
  drm/amd/display: Hardware cursor changes color when switched to
    software cursor

Nicholas Susanto (2):
  drm/amd/display: Remove redundant check in DCN35 hwseq
  drm/amd/display: DCN35 set min dispclk to 50Mhz

Sung Joon Kim (1):
  drm/amd/display: Support UHBR10 link rate on eDP

Tim Huang (1):
  drm/amd/display: fix double free issue during amdgpu module unload

 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   2 +-
 .../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c  |   3 +
 .../gpu/drm/amd/display/dc/core/dc_resource.c |  18 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |   3 +-
 .../amd/display/dc/dccg/dcn35/dcn35_dccg.c    |   4 +-
 drivers/gpu/drm/amd/display/dc/dml2/Makefile  |   3 -
 .../dml21/inc/bounding_boxes/dcn4_soc_bb.h    |   2 +-
 .../dml21/inc/dml_top_soc_parameter_types.h   |   1 +
 .../dml2/dml21/src/dml2_core/dml2_core_dcn4.c |   1 -
 .../src/dml2_core/dml2_core_dcn4_calcs.c      | 478 +++++++------
 .../dml21/src/dml2_core/dml2_core_factory.c   |   2 +-
 .../dml21/src/dml2_core/dml2_core_shared.h    |  37 -
 .../src/dml2_core/dml2_core_shared_types.h    |  22 +-
 .../dml21/src/dml2_core/dml2_core_utils.c     | 631 ++++++++++++++++++
 .../dml21/src/dml2_core/dml2_core_utils.h     |  39 ++
 .../dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c |  54 +-
 .../dml21/src/dml2_dpmm/dml2_dpmm_factory.c   |   2 +-
 .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c  |  20 +-
 .../dml21/src/dml2_pmo/dml2_pmo_factory.c     |   2 +-
 .../amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c |   5 +-
 .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  44 +-
 .../amd/display/dc/hwss/dcn31/dcn31_init.c    |   1 +
 .../amd/display/dc/hwss/dcn314/dcn314_init.c  |   1 +
 .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c   |   3 -
 .../amd/display/dc/hwss/dcn351/dcn351_init.c  |   1 +
 .../drm/amd/display/dc/hwss/hw_sequencer.h    |   1 +
 drivers/gpu/drm/amd/display/dc/inc/resource.h |   2 +
 .../display/dc/link/accessories/link_dp_cts.c |   8 +
 .../drm/amd/display/dc/link/link_detection.c  |   3 +-
 .../gpu/drm/amd/display/dc/link/link_dpms.c   |   4 +-
 .../drm/amd/display/dc/link/link_factory.c    |   3 +-
 .../dc/link/protocols/link_dp_capability.c    |  59 +-
 .../link/protocols/link_edp_panel_control.c   |  14 +-
 .../link/protocols/link_edp_panel_control.h   |   2 +-
 .../dc/resource/dcn35/dcn35_resource.c        |   1 +
 35 files changed, 1110 insertions(+), 366 deletions(-)  delete mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.h

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2.34.1