[PATCH] drm/amdgpu: Add DCC GFX12 flag to enable address alignment

Paneer Selvam, Arunpravin arunpravin.paneerselvam at amd.com
Mon Aug 19 12:43:30 UTC 2024


Hi Christian,

On 8/19/2024 1:59 PM, Christian König wrote:
> Am 05.08.24 um 16:01 schrieb Arunpravin Paneer Selvam:
>> We require this flag AMDGPU_GEM_CREATE_GFX12_DCC or any other
>> kernel level GFX12 DCC flag to differentiate the DCC buffers and other
>> pinned display buffers(which has TTM_PL_FLAG_CONTIGUOUS enabled).
>
> That's a pretty bad idea, the DCC flag is not the right approach to 
> differentiate this.
>
> What other pinned display buffers are you talking about? As far as I 
> can see that patch shouldn't be necessary in any way.

TMR is requesting pinned buffer enabling the TTM_PL_FLAG_CONTIGUOUS. For 
DCC size adjustment,
we will try to over-allocate for the TMR region and that leads to memory 
allocation failure.

Thanks,
Arun.
>
> Regards,
> Christian.
>
>>
>> If we use the TTM_PL_FLAG_CONTIGUOUS flag for DCC buffers, we may over
>> allocate for all the pinned display buffers unnecessarily that leads to
>> memory allocation failure.
>>
>> Signed-off-by: Arunpravin Paneer Selvam 
>> <Arunpravin.PaneerSelvam at amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>> index 5415a5cc7789..7de0ac07a060 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>> @@ -509,7 +509,8 @@ static int amdgpu_vram_mgr_new(struct 
>> ttm_resource_manager *man,
>>           /* Allocate blocks in desired range */
>>           vres->flags |= DRM_BUDDY_RANGE_ALLOCATION;
>>   -    if (adev->gmc.gmc_funcs->get_dcc_alignment)
>> +    if (bo->flags & AMDGPU_GEM_CREATE_GFX12_DCC &&
>> +        adev->gmc.gmc_funcs->get_dcc_alignment)
>>           adjust_dcc_size = amdgpu_gmc_get_dcc_alignment(adev);
>>         remaining_size = (u64)vres->base.size;
>



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