[PATCH v2 1/5] drm/amd: Introduce additional IPS debug flags

[Aurabindo Pillai]

On 8/19/24 3:22 PM, sunpeng.li at amd.com wrote:
> From: Leo Li <sunpeng.li at amd.com>
> 
> [Why]
> 
> Idle power states (IPS) describe levels of power-gating within DCN. DM
> and DC is responsible for ensuring that we are out of IPS before any DCN
> programming happens. Any DCN programming while we're in IPS leads to
> undefined behavior (mostly hangs).
> 
> Because IPS intersects with all display features, the ability to disable
> IPS by default while ironing out the known issues is desired. However,
> disabing it completely will cause important features such as s0ix entry
> to fail.
> 
> Therefore, more granular IPS debug flags are desired.
> 
> [How]
> 
> Extend the dc debug mask bits to include the available list of IPS
> debug flags.
> 
> All the flags should work as documented, with the exception of
> IPS_DISABLE_DYNAMIC. It requires dm changes which will be done in
> later changes.
> 
> v2: enable docs and fix docstring format
> 
> Signed-off-by: Leo Li <sunpeng.li at amd.com>
> ---
>   Documentation/gpu/amdgpu/driver-core.rst      |  2 +-
>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 ++
>   drivers/gpu/drm/amd/include/amd_shared.h      | 75 ++++++++++++++++++-
>   3 files changed, 81 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst
> index 467e6843aef63..32723a925377e 100644
> --- a/Documentation/gpu/amdgpu/driver-core.rst
> +++ b/Documentation/gpu/amdgpu/driver-core.rst
> @@ -179,4 +179,4 @@ IP Blocks
>      :doc: IP Blocks
>   
>   .. kernel-doc:: drivers/gpu/drm/amd/include/amd_shared.h
> -   :identifiers: amd_ip_block_type amd_ip_funcs
> +   :identifiers: amd_ip_block_type amd_ip_funcs DC_DEBUG_MASK
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index dd8353283bda3..a18ecf8607232 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1864,6 +1864,12 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>   
>   	if (amdgpu_dc_debug_mask & DC_DISABLE_IPS)
>   		init_data.flags.disable_ips = DMUB_IPS_DISABLE_ALL;
> +	else if (amdgpu_dc_debug_mask & DC_DISABLE_IPS_DYNAMIC)
> +		init_data.flags.disable_ips = DMUB_IPS_DISABLE_DYNAMIC;
> +	else if (amdgpu_dc_debug_mask & DC_DISABLE_IPS2_DYNAMIC)
> +		init_data.flags.disable_ips = DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF;
> +	else if (amdgpu_dc_debug_mask & DC_FORCE_IPS_ENABLE)
> +		init_data.flags.disable_ips = DMUB_IPS_ENABLE;
>   	else
>   		init_data.flags.disable_ips = DMUB_IPS_ENABLE;
>   
> diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
> index f5b725f10a7ce..745fd052840dc 100644
> --- a/drivers/gpu/drm/amd/include/amd_shared.h
> +++ b/drivers/gpu/drm/amd/include/amd_shared.h
> @@ -61,7 +61,7 @@ enum amd_apu_flags {
>   * acquires the list of IP blocks for the GPU in use on initialization.
>   * It can then operate on this list to perform standard driver operations
>   * such as: init, fini, suspend, resume, etc.
> -*
> +*
>   *
>   * IP block implementations are named using the following convention:
>   * <functionality>_v<version> (E.g.: gfx_v6_0).
> @@ -251,19 +251,92 @@ enum DC_FEATURE_MASK {
>   	DC_REPLAY_MASK = (1 << 9), //0x200, disabled by default for dcn < 3.1.4
>   };
>   
> +/**
> + * enum DC_DEBUG_MASK - Bits that are useful for debugging the Display Core IP
> + */
>   enum DC_DEBUG_MASK {
> +	/**
> +	 * @DC_DISABLE_PIPE_SPLIT: If set, disable pipe-splitting
> +	 */
>   	DC_DISABLE_PIPE_SPLIT = 0x1,
> +
> +	/**
> +	 * @DC_DISABLE_STUTTER: If set, disable memory stutter mode
> +	 */
>   	DC_DISABLE_STUTTER = 0x2,
> +
> +	/**
> +	 * @DC_DISABLE_DSC: If set, disable display stream compression
> +	 */
>   	DC_DISABLE_DSC = 0x4,
> +
> +	/**
> +	 * @DC_DISABLE_CLOCK_GATING: If set, disable clock gating optimizations
> +	 */
>   	DC_DISABLE_CLOCK_GATING = 0x8,
> +
> +	/**
> +	 * @DC_DISABLE_PSR: If set, disable Panel self refresh v1 and PSR-SU
> +	 */
>   	DC_DISABLE_PSR = 0x10,
> +
> +	/**
> +	 * @DC_FORCE_SUBVP_MCLK_SWITCH: If set, force mclk switch in subvp, even
> +	 * if mclk switch in vblank is possible
> +	 */
>   	DC_FORCE_SUBVP_MCLK_SWITCH = 0x20,
> +
> +	/**
> +	 * @DC_DISABLE_MPO: If set, disable multi-plane offloading
> +	 */
>   	DC_DISABLE_MPO = 0x40,
> +
> +	/**
> +	 * @DC_ENABLE_DPIA_TRACE: If set, enable trace logging for DPIA
> +	 */
>   	DC_ENABLE_DPIA_TRACE = 0x80,
> +
> +	/**
> +	 * @DC_ENABLE_DML2: If set, force usage of DML2, even if the DCN version
> +	 * does not default to it.
> +	 */
>   	DC_ENABLE_DML2 = 0x100,
> +
> +	/**
> +	 * @DC_DISABLE_PSR_SU: If set, disable PSR SU
> +	 */
>   	DC_DISABLE_PSR_SU = 0x200,
> +
> +	/**
> +	 * @DC_DISABLE_REPLAY: If set, disable Panel Replay
> +	 */
>   	DC_DISABLE_REPLAY = 0x400,
> +
> +	/**
> +	 * @DC_DISABLE_IPS: If set, disable all Idle Power States, all the time.
> +	 * If more than one IPS debug bit is set, the lowest bit takes
> +	 * precedence. For example, if DC_FORCE_IPS_ENABLE and
> +	 * DC_DISABLE_IPS_DYNAMIC are set, then DC_DISABLE_IPS_DYNAMIC takes
> +	 * precedence.
> +	 */
>   	DC_DISABLE_IPS = 0x800,
> +
> +	/**
> +	 * @DC_DISABLE_IPS_DYNAMIC: If set, disable all IPS, all the time,
> +	 * *except* when driver goes into suspend.
> +	 */
> +	DC_DISABLE_IPS_DYNAMIC = 0x1000,
> +
> +	/**
> +	 * @DC_DISABLE_IPS2_DYNAMIC: If set, disable IPS2 (IPS1 allowed) if
> +	 * there is an enabled display. Otherwise, enable all IPS.
> +	 */
> +	DC_DISABLE_IPS2_DYNAMIC = 0x2000,
> +
> +	/**
> +	 * @DC_FORCE_IPS_ENABLE: If set, force enable all IPS, all the time.
> +	 */
> +	DC_FORCE_IPS_ENABLE = 0x4000,
>   };
>   
>   enum amd_dpm_forced_level;
Reviewed-by: Aurabindo Pillai <aurabindo.pillai at amd.com>

--

Thanks & Regards,
Aurabindo Pillai