[PATCH] drm/amdgpu/swsmu: always force a state reprogram on init

[Feng, Kenneth]

[AMD Official Use Only - AMD Internal Distribution Only]

Reviewed-by: Kenneth Feng <kenneth.feng at amd.com>


-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Saturday, August 24, 2024 2:45 AM
To: amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>
Subject: [PATCH] drm/amdgpu/swsmu: always force a state reprogram on init

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Always reprogram the hardware state on init.  This ensures the PMFW state is explicitly programmed and we are not relying on the default PMFW state.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3131
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 12d30af431fe..c1cd785b4aed 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2224,8 +2224,9 @@ static int smu_bump_power_profile_mode(struct smu_context *smu,  }

 static int smu_adjust_power_state_dynamic(struct smu_context *smu,
-                                  enum amd_dpm_forced_level level,
-                                  bool skip_display_settings)
+                                         enum amd_dpm_forced_level level,
+                                         bool skip_display_settings,
+                                         bool force_update)
 {
        int ret = 0;
        int index = 0;
@@ -2254,7 +2255,7 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu,
                }
        }

-       if (smu_dpm_ctx->dpm_level != level) {
+       if (force_update || smu_dpm_ctx->dpm_level != level) {
                ret = smu_asic_set_performance_level(smu, level);
                if (ret) {
                        dev_err(smu->adev->dev, "Failed to set performance level!"); @@ -2270,7 +2271,7 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu,
                index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
                workload[0] = smu->workload_setting[index];

-               if (smu->power_profile_mode != workload[0])
+               if (force_update || smu->power_profile_mode !=
+ workload[0])
                        smu_bump_power_profile_mode(smu, workload, 0);
        }

@@ -2291,11 +2292,13 @@ static int smu_handle_task(struct smu_context *smu,
                ret = smu_pre_display_config_changed(smu);
                if (ret)
                        return ret;
-               ret = smu_adjust_power_state_dynamic(smu, level, false);
+               ret = smu_adjust_power_state_dynamic(smu, level, false,
+ false);
                break;
        case AMD_PP_TASK_COMPLETE_INIT:
+               ret = smu_adjust_power_state_dynamic(smu, level, true, true);
+               break;
        case AMD_PP_TASK_READJUST_POWER_STATE:
-               ret = smu_adjust_power_state_dynamic(smu, level, true);
+               ret = smu_adjust_power_state_dynamic(smu, level, true,
+ false);
                break;
        default:
                break;
--
2.46.0