[PATCH] drm/amd/display: Remove double checks for `debug.enable_mem_low_power.bits.cm`
Mario Limonciello
mario.limonciello at amd.com
Wed Dec 4 20:27:42 UTC 2024
A variety of the 3DLUT handling functions check
`debug.enable_mem_low_power.bits.cm` both in the caller and function.
For each of them reduce to just checking just in caller or function.
Signed-off-by: Mario Limonciello <mario.limonciello at amd.com>
---
.../drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 31 ++++++++-----------
1 file changed, 13 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
index 40acebd13e46d..53565b60cd847 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
@@ -589,14 +589,12 @@ static void dpp3_power_on_hdr3dlut(
{
struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
- if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) {
- if (power_on) {
- REG_UPDATE(CM_MEM_PWR_CTRL2, HDR3DLUT_MEM_PWR_FORCE, 0);
- REG_WAIT(CM_MEM_PWR_STATUS2, HDR3DLUT_MEM_PWR_STATE, 0, 1, 5);
- } else {
- dpp_base->ctx->dc->optimized_required = true;
- dpp_base->deferred_reg_writes.bits.disable_3dlut = true;
- }
+ if (power_on) {
+ REG_UPDATE(CM_MEM_PWR_CTRL2, HDR3DLUT_MEM_PWR_FORCE, 0);
+ REG_WAIT(CM_MEM_PWR_STATUS2, HDR3DLUT_MEM_PWR_STATE, 0, 1, 5);
+ } else {
+ dpp_base->ctx->dc->optimized_required = true;
+ dpp_base->deferred_reg_writes.bits.disable_3dlut = true;
}
}
@@ -606,14 +604,12 @@ static void dpp3_power_on_shaper(
{
struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
- if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) {
- if (power_on) {
- REG_UPDATE(CM_MEM_PWR_CTRL2, SHAPER_MEM_PWR_FORCE, 0);
- REG_WAIT(CM_MEM_PWR_STATUS2, SHAPER_MEM_PWR_STATE, 0, 1, 5);
- } else {
- dpp_base->ctx->dc->optimized_required = true;
- dpp_base->deferred_reg_writes.bits.disable_shaper = true;
- }
+ if (power_on) {
+ REG_UPDATE(CM_MEM_PWR_CTRL2, SHAPER_MEM_PWR_FORCE, 0);
+ REG_WAIT(CM_MEM_PWR_STATUS2, SHAPER_MEM_PWR_STATE, 0, 1, 5);
+ } else {
+ dpp_base->ctx->dc->optimized_required = true;
+ dpp_base->deferred_reg_writes.bits.disable_shaper = true;
}
}
@@ -789,8 +785,7 @@ static bool dpp3_program_blnd_lut(struct dpp *dpp_base,
if (params == NULL) {
REG_SET(CM_BLNDGAM_CONTROL, 0, CM_BLNDGAM_MODE, 0);
- if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm)
- dpp3_power_on_blnd_lut(dpp_base, false);
+ dpp3_power_on_blnd_lut(dpp_base, false);
return false;
}
--
2.43.0
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