[PATCH] drm/amdgpu: rename register headers to dcn_2_0_1

[Harry Wentland]

On 2024-12-09 10:44, Aurabindo Pillai wrote:
> From: Leo Li <sunpeng.li at amd.com>
> 
> They were named with the incorrect dcn version.
> 
> Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>

Reviewed-by: Harry Wentland <harry.wentland at amd.com>

Harry

> ---
>  .../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c    | 4 ++--
>  .../gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c    | 4 ++--
>  .../gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c  | 4 ++--
>  .../asic_reg/dcn/{dcn_2_0_3_offset.h => dcn_2_0_1_offset.h}   | 4 ++--
>  .../asic_reg/dcn/{dcn_2_0_3_sh_mask.h => dcn_2_0_1_sh_mask.h} | 4 ++--
>  5 files changed, 10 insertions(+), 10 deletions(-)
>  rename drivers/gpu/drm/amd/include/asic_reg/dcn/{dcn_2_0_3_offset.h => dcn_2_0_1_offset.h} (99%)
>  rename drivers/gpu/drm/amd/include/asic_reg/dcn/{dcn_2_0_3_sh_mask.h => dcn_2_0_1_sh_mask.h} (99%)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
> index 7920f6f1aa62..76c612ecfe3c 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
> @@ -34,8 +34,8 @@
>  #include "dm_services.h"
>  
>  #include "cyan_skillfish_ip_offset.h"
> -#include "dcn/dcn_2_0_3_offset.h"
> -#include "dcn/dcn_2_0_3_sh_mask.h"
> +#include "dcn/dcn_2_0_1_offset.h"
> +#include "dcn/dcn_2_0_1_sh_mask.h"
>  #include "clk/clk_11_0_1_offset.h"
>  #include "clk/clk_11_0_1_sh_mask.h"
>  
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c b/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
> index 4fb9cd6708d5..1d61d475d36f 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
> @@ -30,8 +30,8 @@
>  #include "../dce110/irq_service_dce110.h"
>  #include "irq_service_dcn201.h"
>  
> -#include "dcn/dcn_2_0_3_offset.h"
> -#include "dcn/dcn_2_0_3_sh_mask.h"
> +#include "dcn/dcn_2_0_1_offset.h"
> +#include "dcn/dcn_2_0_1_sh_mask.h"
>  
>  #include "cyan_skillfish_ip_offset.h"
>  #include "soc15_hw_ip.h"
> diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
> index d3d67d366523..9f37f0097feb 100644
> --- a/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
> @@ -59,8 +59,8 @@
>  
>  #include "cyan_skillfish_ip_offset.h"
>  
> -#include "dcn/dcn_2_0_3_offset.h"
> -#include "dcn/dcn_2_0_3_sh_mask.h"
> +#include "dcn/dcn_2_0_1_offset.h"
> +#include "dcn/dcn_2_0_1_sh_mask.h"
>  #include "dpcs/dpcs_2_0_3_offset.h"
>  #include "dpcs/dpcs_2_0_3_sh_mask.h"
>  
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_offset.h
> similarity index 99%
> rename from drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_offset.h
> rename to drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_offset.h
> index cae1a7e74323..73c5dd5e83d4 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_offset.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_offset.h
> @@ -19,8 +19,8 @@
>   * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
>   */
>  
> -#ifndef _dcn_2_0_3_OFFSET_HEADER
> -#define _dcn_2_0_3_OFFSET_HEADER
> +#ifndef _dcn_2_0_1_OFFSET_HEADER
> +#define _dcn_2_0_1_OFFSET_HEADER
>  
>  
>  // addressBlock: dce_dc_dccg_dccg_dispdec
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_sh_mask.h
> similarity index 99%
> rename from drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_sh_mask.h
> rename to drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_sh_mask.h
> index ca1e1eb39256..290d807800a6 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_sh_mask.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_sh_mask.h
> @@ -18,8 +18,8 @@
>   * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
>   * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
>   */
> -#ifndef _dcn_2_0_3_SH_MASK_HEADER
> -#define _dcn_2_0_3_SH_MASK_HEADER
> +#ifndef _dcn_2_0_1_SH_MASK_HEADER
> +#define _dcn_2_0_1_SH_MASK_HEADER
>  
>  
>  // addressBlock: dce_dc_dccg_dccg_dispdec