[PATCH 00/17] DC Patches Dec 13, 2024

Wheeler, Daniel Daniel.Wheeler at amd.com
Mon Dec 16 14:23:41 UTC 2024 

[Public]

Hi all,

This week this patchset was tested on 4 systems, two dGPU and two APU based, and tested across multiple display and connection types.

APU
        • Single Display eDP -> 1080p 60hz, 2560x1600 120hz, 1920x1200 165hz
        • Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        • Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k 240hz (Includes USB-C to DP/HDMI adapters)
        • Thunderbolt -> LG Ultrafine 5k
        • MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz displays, HP Hook G2 with 2x 4k60hz displays
        • USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP and 1x 4k60hz HDMI displays
        • SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution supported by the dongle of 4k 120hz YUV420 12bpc.
        • MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the adapter of 4k 120hz RGB 8bpc.

DGPU
        • Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        • Multiple Display DP -> 4k240hz + 4k144hz
        • MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays)
        • MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz displays)

The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to)
        • Changing display configurations and settings
        • Video/Audio playback
        • Benchmark testing
        • Suspend/Resume testing
        • Feature testing (Freesync, HDCP, etc.)

Automated testing includes (but is not limited to)
        • Script testing (scripts to automate some of the manual checks)
        • IGT testing

The testing is mainly tested on the following displays, but occasionally there are tests with other displays
        • Samsung G8 Neo 4k240hz
        • Samsung QN55QN95B 4k 120hz
        • Acer XV322QKKV 4k144hz
        • HP U27 4k Wireless 4k60hz
        • LG 27UD58B 4k60hz
        • LG 32UN650WA 4k60hz
        • LG Ultrafine 5k 5k60hz
        • AU Optronics B140HAN01.1 1080p 60hz eDP
        • AU Optronics B160UAN01.J 1920x1200 165hz eDP
        • AU Optronics B160QAN02.L 2560x1600 120hz eDP

The patchset consists of the amd-staging-drm-next branch (Head commit - ba056752aa4b6d428f002f9050e2b2e1d276b582 -> drm/amdgpu: rename register headers to dcn_2_0_1) with new patches added on top of it.

Tested on Ubuntu 24.04.1, on Wayland and X11, using KDE Plasma and Gnome.

Tested-by: Daniel Wheeler <daniel.wheeler at amd.com>



Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com

Thank you,

Dan Wheeler
Sr. Technologist  |  AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
Facebook |  Twitter |  amd.com


-----Original Message-----
From: Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>
Sent: Friday, December 13, 2024 10:53 AM
To: amd-gfx at lists.freedesktop.org
Cc: Wentland, Harry <Harry.Wentland at amd.com>; Li, Sun peng (Leo) <Sunpeng.Li at amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>; Pillai, Aurabindo <Aurabindo.Pillai at amd.com>; Li, Roman <Roman.Li at amd.com>; Lin, Wayne <Wayne.Lin at amd.com>; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung at amd.com>; Zuo, Jerry <Jerry.Zuo at amd.com>; Mohamed, Zaeem <Zaeem.Mohamed at amd.com>; Chiu, Solomon <Solomon.Chiu at amd.com>; Wheeler, Daniel <Daniel.Wheeler at amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>
Subject: [PATCH 00/17] DC Patches Dec 13, 2024

* Update DML21 code.
* Fixes for FAMS2 interface.
* HDMI fixes.
* Compilation warning fixes.

Cc: Daniel Wheeler <daniel.wheeler at amd.com>

Alex Hung (1):
  drm/amd/display: Fix uninitialized variables in amdgpu_dm_debugfs

Alvin Lee (1):
  drm/amd/display: Update FAMS2 config cmd

Aric Cyr (1):
  drm/amd/display: 3.2.314

Austin Zheng (1):
  drm/amd/display: DML21 Reintegration For Various Fixes

Charlene Liu (1):
  drm/amd/display: init dc_power_state

Chris Park (1):
  drm/amd/display: Block Invalid TMDS operation

Dillon Varone (3):
  drm/amd/display: Add support for FAMS2+ interface versions
  drm/amd/display: Add new message for DF throttling optimization on
    dcn401
  drm/amd/display: Re-validate streams on commit_streams

Fangzhi Zuo (1):
  drm/amd/display: Fix Mode Cutoff in DSC Passthrough to DP2.1 Monitor

George Shen (1):
  drm/amd/display: Disable MPC rate control on ODM pipe update

Harry VanZyllDeJong (1):
  drm/amd/display: Fix brightness adjustment on MiniLED

Meerpate Patel (1):
  drm/amd/display: initialize uninitialized variable

Nicholas Kazlauskas (2):
  drm/amd/display: Apply (some) policy for DML2 formulation on
    DCN35/DCN351
  drm/amd/display: Don't allow IPS2 in D0 for RCG Dynamic

Rodrigo Siqueira (1):
  Revert "drm/amd/display: Fix green screen issue after suspend"

Shunlu Zhang (1):
  drm/amd/display: delete legacy code

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   12 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |    8 +-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |    6 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_plane.c   |   22 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_plane.h   |    3 +-
 .../dc/clk_mgr/dcn401/dcn401_clk_mgr.c        |   46 +
 .../dc/clk_mgr/dcn401/dcn401_clk_mgr.h        |    1 +
 .../clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c   |   23 +
 .../clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h   |    3 +
 drivers/gpu/drm/amd/display/dc/core/dc.c      |   11 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |    6 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |   40 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h  |    1 +
 .../drm/amd/display/dc/dce/dce_clock_source.c |    3 +
 .../dc/dml/dcn30/display_rq_dlg_calc_30.c     |    1 +
 drivers/gpu/drm/amd/display/dc/dml2/Makefile  |   15 +-
 .../amd/display/dc/dml2/display_mode_core.c   |    6 +-
 .../dc/dml2/display_mode_core_structs.h       |  103 +-
 .../amd/display/dc/dml2/display_mode_util.c   |    6 +-
 .../dc/dml2/dml21/dml21_translation_helper.c  |   16 +-
 .../amd/display/dc/dml2/dml21/dml21_utils.c   |   80 +-
 .../dml21/inc/bounding_boxes/dcn4_soc_bb.h    |    3 +-
 .../dml21/inc/dml_top_display_cfg_types.h     |   52 +-
 .../dml21/inc/dml_top_soc_parameter_types.h   |    2 +
 .../display/dc/dml2/dml21/inc/dml_top_types.h |   77 +-
 .../dml2/dml21/src/dml2_core/dml2_core_dcn4.c |   42 +-
 .../src/dml2_core/dml2_core_dcn4_calcs.c      | 1306 +++++++++++------
 .../src/dml2_core/dml2_core_dcn4_calcs.h      |    2 +-
 .../src/dml2_core/dml2_core_shared_types.h    |  129 +-
 .../dml21/src/dml2_core/dml2_core_utils.c     |  223 ++-
 .../dml21/src/dml2_core/dml2_core_utils.h     |    6 +-
 .../dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c |   49 +-
 .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c  |  394 +++--
 .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.h  |    7 +
 .../dml21/src/dml2_pmo/dml2_pmo_factory.c     |    1 -
 .../dml21/src/dml2_top/dml2_top_interfaces.c  |   51 +
 .../dml2/dml21/src/dml2_top/dml2_top_legacy.c |    4 +
 .../dml2/dml21/src/dml2_top/dml2_top_legacy.h |    9 +
 .../src/dml2_top/dml2_top_optimization.c      |  307 ----
 .../src/dml2_top/dml2_top_optimization.h      |   33 -
 .../dml2/dml21/src/dml2_top/dml2_top_soc15.c  | 1177 +++++++++++++++
 .../{dml_top_mcache.h => dml2_top_soc15.h}    |   20 +-
 .../dml2/dml21/src/dml2_top/dml_top_mcache.c  |  549 -------
 .../dc/dml2/dml21/src/inc/dml2_debug.c        |    5 +
 .../dc/dml2/dml21/src/inc/dml2_debug.h        |   46 +-
 .../src/inc/dml2_internal_shared_types.h      |   60 +-
 .../display/dc/dml2/dml2_translation_helper.c |   54 +-
 .../display/dc/dml2/dml_display_rq_dlg_calc.c |   12 -
 .../amd/display/dc/hwss/dcn31/dcn31_init.c    |    2 +-
 .../amd/display/dc/hwss/dcn314/dcn314_hwseq.c |   12 +
 .../amd/display/dc/hwss/dcn314/dcn314_init.c  |    2 +-
 .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c   |   12 +
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c |    5 +-
 .../gpu/drm/amd/display/dc/inc/core_types.h   |    3 +-
 .../gpu/drm/amd/display/dc/link/link_dpms.c   |    4 +
 .../drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c  |   18 +
 .../drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h  |    7 +
 .../amd/display/dc/optc/dcn401/dcn401_optc.c  |    4 +-
 .../dc/resource/dcn401/dcn401_resource.c      |    4 +
 59 files changed, 3225 insertions(+), 1880 deletions(-)  create mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_interfaces.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_legacy.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_legacy.h
 delete mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_optimization.c
 delete mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_optimization.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c
 rename drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/{dml_top_mcache.h => dml2_top_soc15.h} (58%)  delete mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml_top_mcache.c

--
2.45.2

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