[PATCH] drm/amd/pm: denote S to the deep sleep clock

[Kenneth Feng]

denote S to the deep sleep clock for the clock output on smu v13.0.0/v13.0.7/v13.0.10

Signed-off-by: Kenneth Feng <kenneth.feng at amd.com>
---
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 27 +++++++++++++------
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 27 +++++++++++++------
 2 files changed, 38 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 2e7518f4ae1a..fd33646970a4 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -109,6 +109,7 @@
 #define PP_OD_FEATURE_FAN_MINIMUM_PWM			10
 
 #define LINK_SPEED_MAX					3
+#define SMU_13_0_0_DSCLK_THRESHOLD 100
 
 static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] = {
 	MSG_MAP(TestMessage,			PPSMC_MSG_TestMessage,                 1),
@@ -1269,20 +1270,30 @@ static int smu_v13_0_0_print_clk_levels(struct smu_context *smu,
 			 *   - level 0 -> min clock freq
 			 *   - level 1 -> max clock freq
 			 * And the current clock frequency can be any value between them.
-			 * So, if the current clock frequency is not at level 0 or level 1,
-			 * we will fake it as three dpm levels:
+			 * So, if the current clock frequency is lower than level 0,
+			 * we will denote it to S:
+			 *   - level S -> current actual clock freq
 			 *   - level 0 -> min clock freq
-			 *   - level 1 -> current actual clock freq
-			 *   - level 2 -> max clock freq
+			 *   - level 1 -> max clock freq
 			 */
 			if ((single_dpm_table->dpm_levels[0].value != curr_freq) &&
-			     (single_dpm_table->dpm_levels[1].value != curr_freq)) {
+			     (single_dpm_table->dpm_levels[1].value != curr_freq) &&
+				 (curr_freq < SMU_13_0_0_DSCLK_THRESHOLD)) {
+				size += sysfs_emit_at(buf, size, "S: %uMhz *\n",
+						curr_freq);
 				size += sysfs_emit_at(buf, size, "0: %uMhz\n",
 						single_dpm_table->dpm_levels[0].value);
-				size += sysfs_emit_at(buf, size, "1: %uMhz *\n",
-						curr_freq);
-				size += sysfs_emit_at(buf, size, "2: %uMhz\n",
+				size += sysfs_emit_at(buf, size, "1: %uMhz\n",
 						single_dpm_table->dpm_levels[1].value);
+			} else if ((single_dpm_table->dpm_levels[0].value != curr_freq) &&
+						(single_dpm_table->dpm_levels[1].value != curr_freq)) {
+				size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",
+						single_dpm_table->dpm_levels[0].value,
+						single_dpm_table->dpm_levels[0].value == curr_freq ? "*" : "");
+				size += sysfs_emit_at(buf, size, "1: %uMhz *\n", curr_freq);
+				size += sysfs_emit_at(buf, size, "2: %uMhz %s\n",
+						single_dpm_table->dpm_levels[1].value,
+						single_dpm_table->dpm_levels[1].value == curr_freq ? "*" : "");
 			} else {
 				size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",
 						single_dpm_table->dpm_levels[0].value,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index 0ffdb58af74e..2ecebad7a9cb 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -85,6 +85,7 @@
 #define PP_OD_FEATURE_FAN_MINIMUM_PWM			10
 
 #define LINK_SPEED_MAX					3
+#define SMU_13_0_7_DSCLK_THRESHOLD 100
 
 static struct cmn2asic_msg_mapping smu_v13_0_7_message_map[SMU_MSG_MAX_COUNT] = {
 	MSG_MAP(TestMessage,			PPSMC_MSG_TestMessage,                 1),
@@ -1258,20 +1259,30 @@ static int smu_v13_0_7_print_clk_levels(struct smu_context *smu,
 			 *   - level 0 -> min clock freq
 			 *   - level 1 -> max clock freq
 			 * And the current clock frequency can be any value between them.
-			 * So, if the current clock frequency is not at level 0 or level 1,
-			 * we will fake it as three dpm levels:
+			 * So, if the current clock frequency is lower than level 0,
+			 * we will denote it to S:
+			 *   - level S -> current actual clock freq
 			 *   - level 0 -> min clock freq
-			 *   - level 1 -> current actual clock freq
-			 *   - level 2 -> max clock freq
+			 *   - level 1 -> max clock freq
 			 */
 			if ((single_dpm_table->dpm_levels[0].value != curr_freq) &&
-			     (single_dpm_table->dpm_levels[1].value != curr_freq)) {
+			     (single_dpm_table->dpm_levels[1].value != curr_freq) &&
+				 (curr_freq < SMU_13_0_7_DSCLK_THRESHOLD)) {
+				size += sysfs_emit_at(buf, size, "S: %uMhz *\n",
+						curr_freq);
 				size += sysfs_emit_at(buf, size, "0: %uMhz\n",
 						single_dpm_table->dpm_levels[0].value);
-				size += sysfs_emit_at(buf, size, "1: %uMhz *\n",
-						curr_freq);
-				size += sysfs_emit_at(buf, size, "2: %uMhz\n",
+				size += sysfs_emit_at(buf, size, "1: %uMhz\n",
 						single_dpm_table->dpm_levels[1].value);
+			} else if ((single_dpm_table->dpm_levels[0].value != curr_freq) &&
+						(single_dpm_table->dpm_levels[1].value != curr_freq)) {
+				size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",
+						single_dpm_table->dpm_levels[0].value,
+						single_dpm_table->dpm_levels[0].value == curr_freq ? "*" : "");
+				size += sysfs_emit_at(buf, size, "1: %uMhz *\n", curr_freq);
+				size += sysfs_emit_at(buf, size, "2: %uMhz %s\n",
+						single_dpm_table->dpm_levels[1].value,
+						single_dpm_table->dpm_levels[1].value == curr_freq ? "*" : "");
 			} else {
 				size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",
 						single_dpm_table->dpm_levels[0].value,
-- 
2.34.1