[PATCH 0/4] VCN 5.0 Support

[Alex Deucher]

This patch set adds support for VCN (Video Codec Next) 5.0.x.  VCN
is the multimedia codec IP in AMD SoCs.

Patch 1 adds new registers and is too large for the mailing list so
it has been omitted.

Hawking Zhang (1):
  drm/amdgpu: Add vcn v5_0_0 ip headers (v5)

Sonny Jiang (3):
  drm/amdgpu: add VCN_5_0_0 firmware support
  drm/amdgpu: add VCN_5_0_0 IP block support
  amdgpu/drm: Add vcn_v5_0_0_ip_block support

 drivers/gpu/drm/amd/amdgpu/Makefile           |    1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c |    4 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c       |    2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h       |   42 +
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c       | 1339 +++
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.h       |   37 +
 .../include/asic_reg/vcn/vcn_5_0_0_offset.h   | 1672 ++++
 .../include/asic_reg/vcn/vcn_5_0_0_sh_mask.h  | 7627 +++++++++++++++++
 8 files changed, 10724 insertions(+)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
 create mode 100644 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

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2.42.0