[PATCH 3/7] drm/amd/display: Add handling for new "active color format" property

Daniel Vetter daniel at ffwll.ch
Wed Jan 10 11:10:46 UTC 2024


On Tue, Jan 09, 2024 at 06:11:00PM +0000, Andri Yngvason wrote:
> From: Werner Sembach <wse at tuxedocomputers.com>
> 
> This commit implements the "active color format" drm property for the AMD
> GPU driver.
> 
> Signed-off-by: Werner Sembach <wse at tuxedocomputers.com>
> Signed-off-by: Andri Yngvason <andri at yngvason.is>
> Tested-by: Andri Yngvason <andri at yngvason.is>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 42 ++++++++++++++++++-
>  .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |  4 ++
>  2 files changed, 45 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 10e041a3b2545..b44d06c3b1706 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -6882,6 +6882,24 @@ int convert_dc_color_depth_into_bpc(enum dc_color_depth display_color_depth)
>  	return 0;
>  }
>  
> +static int convert_dc_pixel_encoding_into_drm_color_format(
> +	enum dc_pixel_encoding display_pixel_encoding)
> +{
> +	switch (display_pixel_encoding) {
> +	case PIXEL_ENCODING_RGB:
> +		return DRM_COLOR_FORMAT_RGB444;
> +	case PIXEL_ENCODING_YCBCR422:
> +		return DRM_COLOR_FORMAT_YCBCR422;
> +	case PIXEL_ENCODING_YCBCR444:
> +		return DRM_COLOR_FORMAT_YCBCR444;
> +	case PIXEL_ENCODING_YCBCR420:
> +		return DRM_COLOR_FORMAT_YCBCR420;
> +	default:
> +		break;
> +	}
> +	return 0;
> +}
> +
>  static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder,
>  					  struct drm_crtc_state *crtc_state,
>  					  struct drm_connector_state *conn_state)
> @@ -7436,8 +7454,10 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm,
>  				adev->mode_info.underscan_vborder_property,
>  				0);
>  
> -	if (!aconnector->mst_root)
> +	if (!aconnector->mst_root) {
>  		drm_connector_attach_max_bpc_property(&aconnector->base, 8, 16);
> +		drm_connector_attach_active_color_format_property(&aconnector->base);
> +	}
>  
>  	aconnector->base.state->max_bpc = 16;
>  	aconnector->base.state->max_requested_bpc = aconnector->base.state->max_bpc;
> @@ -8969,6 +8989,26 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
>  		kfree(dummy_updates);
>  	}
>  
> +	/* Extract information from crtc to communicate it to userspace as connector properties */
> +	for_each_new_connector_in_state(state, connector, new_con_state, i) {
> +		struct drm_crtc *crtc = new_con_state->crtc;
> +		struct dc_stream_state *stream;
> +
> +		if (crtc) {
> +			new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
> +			dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
> +			stream = dm_new_crtc_state->stream;
> +
> +			if (stream) {
> +				drm_connector_set_active_color_format_property(connector,
> +					convert_dc_pixel_encoding_into_drm_color_format(
> +						dm_new_crtc_state->stream->timing.pixel_encoding));
> +			}
> +		} else {
> +			drm_connector_set_active_color_format_property(connector, 0);

Just realized an even bigger reason why your current design doesn't work:
You don't have locking here.

And you cannot grab the required lock, which is
drm_dev->mode_config.mutex, because that would result in deadlocks. So
this really needs to use the atomic state based design I've described.

A bit a tanget, but it would be really good to add a lockdep assert into
drm_object_property_set_value, that at least for atomic drivers and
connectors the above lock must be held for changing property values. But
it will be quite a bit of audit to make sure all current users obey that
rule.

Cheers, Sima
> +		}
> +	}
> +
>  	/**
>  	 * Enable interrupts for CRTCs that are newly enabled or went through
>  	 * a modeset. It was intentionally deferred until after the front end
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 11da0eebee6c4..a4d1b3ea8f81c 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@ -600,6 +600,10 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
>  	if (connector->max_bpc_property)
>  		drm_connector_attach_max_bpc_property(connector, 8, 16);
>  
> +	connector->active_color_format_property = master->base.active_color_format_property;
> +	if (connector->active_color_format_property)
> +		drm_connector_attach_active_color_format_property(&aconnector->base);
> +
>  	connector->vrr_capable_property = master->base.vrr_capable_property;
>  	if (connector->vrr_capable_property)
>  		drm_connector_attach_vrr_capable_property(connector);
> -- 
> 2.43.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


More information about the amd-gfx mailing list