[PATCH] drm/amdgpu: set CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1

[Lazar, Lijo]

On 7/4/2024 9:10 PM, Zhigang Luo wrote:
> to avoid reading wrong WPTR from doorbell in sriov vf, set
> CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1 to read WPTR from MQD.
> 
> Signed-off-by: Zhigang Luo <Zhigang.Luo at amd.com>

Acked-by: Lijo Lazar <lijo.lazar at amd.com>

Thanks,
Lijo

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c         | 3 +++
>  drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c | 3 +++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> index 8d8763ebe027..4556a1be5f71 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> @@ -1584,6 +1584,9 @@ static int gfx_v9_4_3_xcc_mqd_init(struct amdgpu_ring *ring, int xcc_id)
>  				    DOORBELL_SOURCE, 0);
>  		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
>  				    DOORBELL_HIT, 0);
> +		if (amdgpu_sriov_vf(adev))
> +			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
> +					    DOORBELL_MODE, 1);
>  	} else {
>  		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
>  					 DOORBELL_EN, 0);
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
> index 399fa2106631..66c73825c0a0 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
> @@ -546,6 +546,9 @@ static void init_mqd_hiq_v9_4_3(struct mqd_manager *mm, void **mqd,
>  		m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |
>  					1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT |
>  					1 << CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT;
> +		if (amdgpu_sriov_vf(mm->dev->adev))
> +			m->cp_hqd_pq_doorbell_control |= 1 <<
> +				CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
>  		m->cp_mqd_stride_size = kfd_hiq_mqd_stride(mm->dev);
>  		if (xcc == 0) {
>  			/* Set no_update_rptr = 0 in Master XCC */