[PATCH v2] drm/amd/display: Add NULL check for clk_mgr and clk_mgr->funcs in dcn401_init_hw

Alex Hung alex.hung at amd.com
Mon Jul 22 17:25:01 UTC 2024


Reviewed-by: Alex Hung <alex.hung at amd.com>

On 2024-07-22 05:28, Srinivasan Shanmugam wrote:
> This commit addresses a potential null pointer dereference issue in the
> `dcn401_init_hw` function. The issue could occur when `dc->clk_mgr` or
> `dc->clk_mgr->funcs` is null.
> 
> The fix adds a check to ensure `dc->clk_mgr` and `dc->clk_mgr->funcs` is
> not null before accessing its functions. This prevents a potential null
> pointer dereference.
> 
> Reported by smatch:
> drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c:416 dcn401_init_hw() error: we previously assumed 'dc->clk_mgr' could be null (see line 225)
> 
> Cc: Tom Chung <chiahsuan.chung at amd.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
> Cc: Roman Li <roman.li at amd.com>
> Cc: Alex Hung <alex.hung at amd.com>
> Cc: Aurabindo Pillai <aurabindo.pillai at amd.com>
> Cc: Harry Wentland <harry.wentland at amd.com>
> Cc: Hamza Mahfooz <hamza.mahfooz at amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam at amd.com>
> ---
> v2: Along with "dc->clk_mgr" add check for even dc->clk_mgr->funcs" (Tom)
> 
>   drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
> index 87c5ef579ecb..0fa610590245 100644
> --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
> @@ -222,7 +222,7 @@ void dcn401_init_hw(struct dc *dc)
>   	uint32_t backlight = MAX_BACKLIGHT_LEVEL;
>   	uint32_t user_level = MAX_BACKLIGHT_LEVEL;
>   
> -	if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) {
> +	if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks) {
>   		dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);
>   
>   		// mark dcmode limits present if any clock has distinct AC and DC values from SMU
> @@ -413,7 +413,7 @@ void dcn401_init_hw(struct dc *dc)
>   	if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)
>   		dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);
>   
> -	if (dc->clk_mgr->funcs->notify_wm_ranges)
> +	if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->notify_wm_ranges)
>   		dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);
>   
>   	if (dc->res_pool->hubbub->funcs->force_pstate_change_control)
> @@ -435,7 +435,9 @@ void dcn401_init_hw(struct dc *dc)
>   		dc->debug.fams2_config.bits.enable &= dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver == 2;
>   		if (!dc->debug.fams2_config.bits.enable && dc->res_pool->funcs->update_bw_bounding_box) {
>   			/* update bounding box if FAMS2 disabled */
> -			dc->res_pool->funcs->update_bw_bounding_box(dc, dc->clk_mgr->bw_params);
> +			if (dc->clk_mgr)
> +				dc->res_pool->funcs->update_bw_bounding_box(dc,
> +									    dc->clk_mgr->bw_params);
>   		}
>   	}
>   }


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