[PATCH V2 2/2] drm/amd/display/dcn401: use pre-allocated temp structure for bounding box

Zhang, George George.Zhang at amd.com
Wed Jun 5 18:22:25 UTC 2024


[AMD Official Use Only - AMD Internal Distribution Only]

Tested-by: George Zhang <George.zhang at amd.com>

Thanks,
George

-----Original Message-----
From: Deucher, Alexander <Alexander.Deucher at amd.com>
Sent: Tuesday, June 4, 2024 4:26 PM
To: amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Mahfooz, Hamza <Hamza.Mahfooz at amd.com>; Zhang, George <George.Zhang at amd.com>; Arnd Bergmann <arnd at arndb.de>; Wentland, Harry <Harry.Wentland at amd.com>; Li, Sun peng (Leo) <Sunpeng.Li at amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>
Subject: [PATCH V2 2/2] drm/amd/display/dcn401: use pre-allocated temp structure for bounding box

This mirrors what the driver does for older DCN generations.

Should fix:
[   26.924055] BUG: sleeping function called from invalid context at include/linux/sched/mm.h:306
[   26.924060] in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1022, name: modprobe
[   26.924063] preempt_count: 2, expected: 0
[   26.924064] RCU nest depth: 0, expected: 0
[   26.924066] Preemption disabled at:
[   26.924067] [<ffffffffc089e5e0>] dc_fpu_begin+0x30/0xd0 [amdgpu]
[   26.924322] CPU: 9 PID: 1022 Comm: modprobe Not tainted 6.8.0+ #20
[   26.924325] Hardware name: System manufacturer System Product Name/CROSSHAIR VI HERO, BIOS 6302 10/23/2018
[   26.924326] Call Trace:
[   26.924327]  <TASK>
[   26.924329]  dump_stack_lvl+0x37/0x50
[   26.924333]  ? dc_fpu_begin+0x30/0xd0 [amdgpu]
[   26.924589]  dump_stack+0x10/0x20
[   26.924592]  __might_resched+0x16a/0x1c0
[   26.924596]  __might_sleep+0x42/0x70
[   26.924598]  __kmalloc_node_track_caller+0x2ad/0x4b0
[   26.924601]  ? dm_helpers_allocate_gpu_mem+0x12/0x20 [amdgpu]
[   26.924855]  ? dcn401_update_bw_bounding_box+0x2a/0xf0 [amdgpu]
[   26.925122]  kmemdup+0x20/0x50
[   26.925124]  ? kernel_fpu_begin_mask+0x6b/0xe0
[   26.925127]  ? kmemdup+0x20/0x50
[   26.925129]  dcn401_update_bw_bounding_box+0x2a/0xf0 [amdgpu]
[   26.925393]  dc_create+0x311/0x670 [amdgpu]
[   26.925649]  amdgpu_dm_init+0x2aa/0x1fa0 [amdgpu]
[   26.925903]  ? irq_work_queue+0x38/0x50
[   26.925907]  ? vprintk_emit+0x1e7/0x270
[   26.925910]  ? dev_printk_emit+0x83/0xb0
[   26.925914]  ? amdgpu_device_rreg+0x17/0x20 [amdgpu]
[   26.926133]  dm_hw_init+0x14/0x30 [amdgpu]

v2: drop extra memcpy

Fixes: 669d6b078ed8 ("drm/amd/display: avoid large on-stack structures")
Suggested-by: Hamza Mahfooz <hamza.mahfooz at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
Cc: George Zhang <george.zhang at amd.com>
Cc: Arnd Bergmann <arnd at arndb.de>
Cc: harry.wentland at amd.com
Cc: sunpeng.li at amd.com
Cc: Rodrigo.Siqueira at amd.com
---
 drivers/gpu/drm/amd/display/dc/core/dc_state.c      | 13 +++++--------
 .../display/dc/resource/dcn401/dcn401_resource.c    |  8 ++------
 2 files changed, 7 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_state.c b/drivers/gpu/drm/amd/display/dc/core/dc_state.c
index 8ea9391c60b7..06b22897137e 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_state.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_state.c
@@ -192,15 +192,14 @@ static void init_state(struct dc *dc, struct dc_state *state)
 /* Public dc_state functions */
 struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params *params)  {
+       struct dc_state *state;
 #ifdef CONFIG_DRM_AMD_DC_FP
-       struct dml2_configuration_options *dml2_opt;
+       struct dml2_configuration_options *dml2_opt = &dc->dml2_tmp;

-       dml2_opt = kmemdup(&dc->dml2_options, sizeof(*dml2_opt), GFP_KERNEL);
-       if (!dml2_opt)
-               return NULL;
+       memcpy(dml2_opt, &dc->dml2_options, sizeof(dc->dml2_options));
 #endif
-       struct dc_state *state = kvzalloc(sizeof(struct dc_state),
-                       GFP_KERNEL);
+
+       state = kvzalloc(sizeof(struct dc_state), GFP_KERNEL);

        if (!state)
                return NULL;
@@ -217,8 +216,6 @@ struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params *p
                dml2_opt->use_clock_dc_limits = true;
                dml2_create(dc, dml2_opt, &state->bw_ctx.dml2_dc_power_source);
        }
-
-       kfree(dml2_opt);
 #endif

        kref_init(&state->refcount);
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
index 8dfb0a3d21cb..029ad7bd7b5b 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
@@ -1581,11 +1581,9 @@ static struct dc_cap_funcs cap_funcs = {

 static void dcn401_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)  {
-       struct dml2_configuration_options *dml2_opt;
+       struct dml2_configuration_options *dml2_opt = &dc->dml2_tmp;

-       dml2_opt = kmemdup(&dc->dml2_options, sizeof(*dml2_opt), GFP_KERNEL);
-       if (!dml2_opt)
-               return;
+       memcpy(dml2_opt, &dc->dml2_options, sizeof(dc->dml2_options));

        DC_FP_START();

@@ -1600,8 +1598,6 @@ static void dcn401_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *b
                dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source);

        DC_FP_END();
-
-       kfree(dml2_opt);
 }

 enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state)
--
2.45.1



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