[PATCH] drm/amdgpu: Reset IH OVERFLOW_EN bit for IH 7.0

[Christian König]

Am 10.03.24 um 06:40 schrieb Friedrich Vock:
> IH 7.0 support landed shortly after the original patch for resetting the
> bit on all other generations, but without that patch applied.
>
> Cc: Christian König <christian.koenig at amd.com>
> Cc: Alex Deucher <alexander.deucher at amd.com>
>
> Signed-off-by: Friedrich Vock <friedrich.vock at gmx.de>

Reviewed-by: Christian König <christian.koenig at amd.com>

I'm going to pick that up Alex.

Regards,
Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/ih_v7_0.c | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
> index 16fe428c0722d..7aed96fa10a9d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
> @@ -418,6 +418,12 @@ static u32 ih_v7_0_get_wptr(struct amdgpu_device *adev,
>   	tmp = RREG32_NO_KIQ(ih_regs->ih_rb_cntl);
>   	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
>   	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
> +
> +	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
> +	 * can be detected.
> +	 */
> +	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
> +	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
>   out:
>   	return (wptr & ih->ptr_mask);
>   }
> --
> 2.44.0
>