[bug report] drm/amd/display: Add debug counters to IPS exit prints
Dan Carpenter
dan.carpenter at linaro.org
Fri Mar 15 15:26:12 UTC 2024
Hello Nicholas Kazlauskas,
Commit 2dfaea1d715a ("drm/amd/display: Add debug counters to IPS exit
prints") from Feb 21, 2024 (linux-next), leads to the following
Smatch static checker warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:1398 dc_dmub_srv_exit_low_power_state() error: uninitialized symbol 'ips1_exit_count'.
drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:1398 dc_dmub_srv_exit_low_power_state() error: uninitialized symbol 'ips2_exit_count'.
drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:1398 dc_dmub_srv_exit_low_power_state() error: uninitialized symbol 'rcg_exit_count'.
drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c
1279 static void dc_dmub_srv_exit_low_power_state(const struct dc *dc)
1280 {
1281 struct dc_dmub_srv *dc_dmub_srv;
1282 uint32_t rcg_exit_count, ips1_exit_count, ips2_exit_count;
1283
1284 if (dc->debug.dmcub_emulation)
1285 return;
1286
1287 if (!dc->ctx->dmub_srv || !dc->ctx->dmub_srv->dmub)
1288 return;
1289
1290 dc_dmub_srv = dc->ctx->dmub_srv;
1291
1292 if (dc->clk_mgr->funcs->exit_low_power_state) {
1293 volatile const struct dmub_shared_state_ips_fw *ips_fw =
1294 &dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw;
1295 volatile struct dmub_shared_state_ips_driver *ips_driver =
1296 &dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_DRIVER].data.ips_driver;
1297 union dmub_shared_state_ips_driver_signals prev_driver_signals = ips_driver->signals;
1298
1299 rcg_exit_count = ips_fw->rcg_exit_count;
1300 ips1_exit_count = ips_fw->ips1_exit_count;
1301 ips2_exit_count = ips_fw->ips2_exit_count;
1302
1303 ips_driver->signals.all = 0;
1304
1305 DC_LOG_IPS(
1306 "%s (allow ips1=%d ips2=%d) (commit ips1=%d ips2=%d) (count rcg=%d ips1=%d ips2=%d)",
1307 __func__,
1308 ips_driver->signals.bits.allow_ips1,
1309 ips_driver->signals.bits.allow_ips2,
1310 ips_fw->signals.bits.ips1_commit,
1311 ips_fw->signals.bits.ips2_commit,
1312 ips_fw->rcg_entry_count,
1313 ips_fw->ips1_entry_count,
1314 ips_fw->ips2_entry_count);
1315
1316 /* Note: register access has technically not resumed for DCN here, but we
1317 * need to be message PMFW through our standard register interface.
1318 */
1319 dc_dmub_srv->needs_idle_wake = false;
1320
1321 if (prev_driver_signals.bits.allow_ips2) {
1322 DC_LOG_IPS(
1323 "wait IPS2 eval (ips1_commit=%d ips2_commit=%d)",
1324 ips_fw->signals.bits.ips1_commit,
1325 ips_fw->signals.bits.ips2_commit);
1326
1327 udelay(dc->debug.ips2_eval_delay_us);
1328
1329 if (ips_fw->signals.bits.ips2_commit) {
1330 DC_LOG_IPS(
1331 "exit IPS2 #1 (ips1_commit=%d ips2_commit=%d)",
1332 ips_fw->signals.bits.ips1_commit,
1333 ips_fw->signals.bits.ips2_commit);
1334
1335 // Tell PMFW to exit low power state
1336 dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);
1337
1338 DC_LOG_IPS(
1339 "wait IPS2 entry delay (ips1_commit=%d ips2_commit=%d)",
1340 ips_fw->signals.bits.ips1_commit,
1341 ips_fw->signals.bits.ips2_commit);
1342
1343 // Wait for IPS2 entry upper bound
1344 udelay(dc->debug.ips2_entry_delay_us);
1345
1346 DC_LOG_IPS(
1347 "exit IPS2 #2 (ips1_commit=%d ips2_commit=%d)",
1348 ips_fw->signals.bits.ips1_commit,
1349 ips_fw->signals.bits.ips2_commit);
1350
1351 dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);
1352
1353 DC_LOG_IPS(
1354 "wait IPS2 commit clear (ips1_commit=%d ips2_commit=%d)",
1355 ips_fw->signals.bits.ips1_commit,
1356 ips_fw->signals.bits.ips2_commit);
1357
1358 while (ips_fw->signals.bits.ips2_commit)
1359 udelay(1);
1360
1361 DC_LOG_IPS(
1362 "wait hw_pwr_up (ips1_commit=%d ips2_commit=%d)",
1363 ips_fw->signals.bits.ips1_commit,
1364 ips_fw->signals.bits.ips2_commit);
1365
1366 if (!dc_dmub_srv_is_hw_pwr_up(dc->ctx->dmub_srv, true))
1367 ASSERT(0);
1368
1369 DC_LOG_IPS(
1370 "resync inbox1 (ips1_commit=%d ips2_commit=%d)",
1371 ips_fw->signals.bits.ips1_commit,
1372 ips_fw->signals.bits.ips2_commit);
1373
1374 dmub_srv_sync_inbox1(dc->ctx->dmub_srv->dmub);
1375 }
1376 }
1377
1378 dc_dmub_srv_notify_idle(dc, false);
1379 if (prev_driver_signals.bits.allow_ips1) {
1380 DC_LOG_IPS(
1381 "wait for IPS1 commit clear (ips1_commit=%d ips2_commit=%d)",
1382 ips_fw->signals.bits.ips1_commit,
1383 ips_fw->signals.bits.ips2_commit);
1384
1385 while (ips_fw->signals.bits.ips1_commit)
1386 udelay(1);
1387
1388 DC_LOG_IPS(
1389 "wait for IPS1 commit clear done (ips1_commit=%d ips2_commit=%d)",
1390 ips_fw->signals.bits.ips1_commit,
1391 ips_fw->signals.bits.ips2_commit);
1392 }
1393 }
variables uninitialized on else path
1394
1395 if (!dc_dmub_srv_is_hw_pwr_up(dc->ctx->dmub_srv, true))
1396 ASSERT(0);
1397
--> 1398 DC_LOG_IPS("%s exit (count rcg=%d ips1=%d ips2=%d)",
1399 __func__,
1400 rcg_exit_count,
1401 ips1_exit_count,
1402 ips2_exit_count);
used here
1403 }
regards,
dan carpenter
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