[PATCH 3/4] drm/amdgpu: Add smuio callback to get gpu clk counter

Alex Deucher alexander.deucher at amd.com
Mon Mar 18 20:42:51 UTC 2024


From: Hawking Zhang <Hawking.Zhang at amd.com>

Add smuio callback to get gpu clk counter

Signed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
Reviewed-by: Likun Gao <Likun.Gao at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h  |  1 +
 drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c | 21 +++++++++++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h
index ff4435181055..ec9d12f85f39 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h
@@ -44,6 +44,7 @@ struct amdgpu_smuio_funcs {
 	u32 (*get_socket_id)(struct amdgpu_device *adev);
 	enum amdgpu_pkg_type (*get_pkg_type)(struct amdgpu_device *adev);
 	bool (*is_host_gpu_xgmi_supported)(struct amdgpu_device *adev);
+	u64 (*get_gpu_clock_counter)(struct amdgpu_device *adev);
 };
 
 struct amdgpu_smuio {
diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c b/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c
index 7b7cca220b26..2a51a70d4846 100644
--- a/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c
@@ -24,6 +24,7 @@
 #include "smuio_v14_0_2.h"
 #include "smuio/smuio_14_0_2_offset.h"
 #include "smuio/smuio_14_0_2_sh_mask.h"
+#include <linux/preempt.h>
 
 static u32 smuio_v14_0_2_get_rom_index_offset(struct amdgpu_device *adev)
 {
@@ -35,7 +36,27 @@ static u32 smuio_v14_0_2_get_rom_data_offset(struct amdgpu_device *adev)
 	return SOC15_REG_OFFSET(SMUIO, 0, regROM_DATA);
 }
 
+static u64 smuio_v14_0_2_get_gpu_clock_counter(struct amdgpu_device *adev)
+{
+	u64 clock;
+	u64 clock_counter_lo, clock_counter_hi_pre, clock_counter_hi_after;
+
+	preempt_disable();
+	clock_counter_hi_pre = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);
+	clock_counter_lo = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER);
+	/* the clock counter may be udpated during polling the counters */
+	clock_counter_hi_after = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);
+	if (clock_counter_hi_pre != clock_counter_hi_after)
+		clock_counter_lo = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER);
+	preempt_enable();
+
+	clock = clock_counter_lo | (clock_counter_hi_after << 32ULL);
+
+	return clock;
+}
+
 const struct amdgpu_smuio_funcs smuio_v14_0_2_funcs = {
 	.get_rom_index_offset = smuio_v14_0_2_get_rom_index_offset,
 	.get_rom_data_offset = smuio_v14_0_2_get_rom_data_offset,
+	.get_gpu_clock_counter = smuio_v14_0_2_get_gpu_clock_counter,
 };
-- 
2.44.0



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