[PATCH 1/3] drm/amdgpu/gfx11: select HDP ref/mask according to gfx ring pipe

[Alex Deucher]

Ping again.  This series enables a high priority gfx queue on gfx11,
similar to gfx10.

Alex

On Tue, May 7, 2024 at 9:26 AM Alex Deucher <alexdeucher at gmail.com> wrote:
>
> Ping on this series?
>
> On Thu, May 2, 2024 at 6:02 PM Alex Deucher <alexander.deucher at amd.com> wrote:
> >
> > Use correct ref/mask for differnent gfx ring pipe. Ported from
> > ZhenGuo's patch for gfx10.
> >
> > Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > index ad6431013c738..81a35d0f0a58e 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > @@ -5293,7 +5293,7 @@ static void gfx_v11_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
> >                 }
> >                 reg_mem_engine = 0;
> >         } else {
> > -               ref_and_mask = nbio_hf_reg->ref_and_mask_cp0;
> > +               ref_and_mask = nbio_hf_reg->ref_and_mask_cp0 << ring->pipe;
> >                 reg_mem_engine = 1; /* pfp */
> >         }
> >
> > --
> > 2.44.0
> >