[PATCH 18/22 V3] drm/amd/pm: check negtive return for table entries

Huang, Tim Tim.Huang at amd.com
Mon May 13 08:10:39 UTC 2024


[AMD Official Use Only - AMD Internal Distribution Only]

This patch is,

Reviewed-by: Tim Huang <Tim.Huang at amd.com>



> -----Original Message-----
> From: Jesse Zhang <jesse.zhang at amd.com>
> Sent: Monday, May 13, 2024 4:06 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian
> <Christian.Koenig at amd.com>; Huang, Tim <Tim.Huang at amd.com>; Zhang,
> Jesse(Jie) <Jesse.Zhang at amd.com>; Zhang, Jesse(Jie)
> <Jesse.Zhang at amd.com>
> Subject: [PATCH 18/22 V3] drm/amd/pm: check negtive return for table
> entries
>
> Function hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr)
> returns a negative number
>
> Signed-off-by: Jesse Zhang <Jesse.Zhang at amd.com>
> Suggested-by: Tim Huang <Tim.Huang at amd.com>
> ---
>  drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c | 13 ++++++++-----
>  1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c
> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c
> index f4bd8e9357e2..18f00038d844 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c
> @@ -30,9 +30,8 @@ int psm_init_power_state_table(struct pp_hwmgr
> *hwmgr)  {
>       int result;
>       unsigned int i;
> -     unsigned int table_entries;
>       struct pp_power_state *state;
> -     int size;
> +     int size, table_entries;
>
>       if (hwmgr->hwmgr_func->get_num_of_pp_table_entries == NULL)
>               return 0;
> @@ -40,15 +39,19 @@ int psm_init_power_state_table(struct pp_hwmgr
> *hwmgr)
>       if (hwmgr->hwmgr_func->get_power_state_size == NULL)
>               return 0;
>
> -     hwmgr->num_ps = table_entries =
> hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr);
> +     table_entries =
> hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr);
>
> -     hwmgr->ps_size = size =
> hwmgr->hwmgr_func->get_power_state_size(hwmgr) +
> +     size = hwmgr->hwmgr_func->get_power_state_size(hwmgr) +
>                                         sizeof(struct pp_power_state);
>
> -     if (table_entries == 0 || size == 0) {
> +     if (table_entries <= 0 || size == 0) {
>               pr_warn("Please check whether power state management is
> supported on this asic\n");
> +             hwmgr->num_ps = 0;
> +             hwmgr->ps_size = 0;
>               return 0;
>       }
> +     hwmgr->num_ps = table_entries;
> +     hwmgr->ps_size = size;
>
>       hwmgr->ps = kcalloc(table_entries, size, GFP_KERNEL);
>       if (hwmgr->ps == NULL)
> --
> 2.25.1



More information about the amd-gfx mailing list