[PATCH 1/8] drm/amdgpu: support imu for gc 12_0_0

Zhang, Hawking Hawking.Zhang at amd.com
Tue May 14 10:11:05 UTC 2024


[AMD Official Use Only - AMD Internal Distribution Only]

Series is

Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>

Regards,
Hawking
-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Gao, Likun
Sent: Tuesday, May 14, 2024 16:51
To: amd-gfx list <amd-gfx at lists.freedesktop.org>
Subject: [PATCH 1/8] drm/amdgpu: support imu for gc 12_0_0

[AMD Official Use Only - AMD Internal Distribution Only]

[AMD Official Use Only - AMD Internal Distribution Only]

From: Likun Gao <Likun.Gao at amd.com>

Support IMU for ASIC with GC 12.0.0
Drop some unused function.

Signed-off-by: Likun Gao <Likun.Gao at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/imu_v12_0.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c b/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
index 032ae12b2be2..0c8ef908d112 100644
--- a/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
@@ -32,6 +32,7 @@
 #include "gc/gc_12_0_0_sh_mask.h"
 #include "mmhub/mmhub_4_1_0_offset.h"

+MODULE_FIRMWARE("amdgpu/gc_12_0_0_imu.bin");
 MODULE_FIRMWARE("amdgpu/gc_12_0_1_imu.bin");

 #define TRANSFER_RAM_MASK      0x001c0000
@@ -367,6 +368,7 @@ static void imu_v12_0_program_rlc_ram(struct amdgpu_device *adev)
        WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, 0x2);

        switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
+       case IP_VERSION(12, 0, 0):
        case IP_VERSION(12, 0, 1):
                if (!r)
                        program_imu_rlc_ram(adev, data, (const u32)size);
--
2.34.1



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