[PATCH] drm/amdgpu/atomfirmware: add intergrated info v2.3 table
Alex Deucher
alexdeucher at gmail.com
Mon May 20 13:05:14 UTC 2024
Acked-by: Alex Deucher <alexander.deucher at amd.com>
On Mon, May 20, 2024 at 7:07 AM Li Ma <li.ma at amd.com> wrote:
>
> [Why]
> The vram width value is 0.
> Because the integratedsysteminfo table in VBIOS has updated to 2.3.
>
> [Solution]
> Driver needs a new intergrated info v2.3 table too.
> Then the vram width value will be correct.
>
> Signed-off-by: Li Ma <li.ma at amd.com>
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 15 ++++++
> drivers/gpu/drm/amd/include/atomfirmware.h | 47 +++++++++++++++++++
> 2 files changed, 62 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> index 6fe84151332e..f932bec6e534 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> @@ -212,6 +212,7 @@ union igp_info {
> struct atom_integrated_system_info_v1_11 v11;
> struct atom_integrated_system_info_v1_12 v12;
> struct atom_integrated_system_info_v2_1 v21;
> + struct atom_integrated_system_info_v2_3 v23;
> };
>
> union umc_info {
> @@ -366,6 +367,20 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
> if (vram_type)
> *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
> break;
> + case 3:
> + mem_channel_number = igp_info->v23.umachannelnumber;
> + if (!mem_channel_number)
> + mem_channel_number = 1;
> + mem_type = igp_info->v23.memorytype;
> + if (mem_type == LpDdr5MemType)
> + mem_channel_width = 32;
> + else
> + mem_channel_width = 64;
> + if (vram_width)
> + *vram_width = mem_channel_number * mem_channel_width;
> + if (vram_type)
> + *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
> + break;
> default:
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
> index af3eebb4c9bc..8c031bb675a5 100644
> --- a/drivers/gpu/drm/amd/include/atomfirmware.h
> +++ b/drivers/gpu/drm/amd/include/atomfirmware.h
> @@ -1657,6 +1657,53 @@ struct atom_integrated_system_info_v2_2
> uint32_t reserved4[189];
> };
>
> +struct uma_carveout_option
> +{
> + char optionName[29]; //max length of string is 28chars + '\0'. Current design is for "minimum", "Medium", "High". This makes entire struct size 64bits
> + uint8_t memoryCarvedGb; //memory carved out with setting
> + uint8_t memoryRemainingGb; //memory remaining on system
> + union
> + {
> + struct _flags
> + {
> + uint8_t Auto : 1;
> + uint8_t Custom : 1;
> + uint8_t Reserved : 6;
> + } flags;
> + uint8_t all8;
> + } uma_carveout_option_flags;
> +};
> +
> +struct atom_integrated_system_info_v2_3
> +{
> + struct atom_common_table_header table_header;
> + uint32_t vbios_misc; // enum of atom_system_vbiosmisc_def
> + uint32_t gpucapinfo; // enum of atom_system_gpucapinf_def
> + uint32_t system_config;
> + uint32_t cpucapinfo;
> + uint16_t gpuclk_ss_percentage; // unit of 0.001%, 1000 mean 1%
> + uint16_t gpuclk_ss_type;
> + uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
> + uint8_t memorytype; // enum of atom_dmi_t17_mem_type_def, APU memory type indication.
> + uint8_t umachannelnumber; // number of memory channels
> + uint8_t htc_hyst_limit;
> + uint8_t htc_tmp_limit;
> + uint8_t reserved1; // dp_ss_control
> + uint8_t gpu_package_id;
> + struct edp_info_table edp1_info;
> + struct edp_info_table edp2_info;
> + uint32_t reserved2[8];
> + struct atom_external_display_connection_info extdispconninfo;
> + uint8_t UMACarveoutVersion;
> + uint8_t UMACarveoutIndexMax;
> + uint8_t UMACarveoutTypeDefault;
> + uint8_t UMACarveoutIndexDefault;
> + uint8_t UMACarveoutType; //Auto or Custom
> + uint8_t UMACarveoutIndex;
> + struct uma_carveout_option UMASizeControlOption[20];
> + uint8_t reserved3[110];
> +};
> +
> // system_config
> enum atom_system_vbiosmisc_def{
> INTEGRATED_SYSTEM_INFO__GET_EDID_CALLBACK_FUNC_SUPPORT = 0x01,
> --
> 2.25.1
>
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