[PATCH 27/32] drm/amd/display: Program DIG FE source select for DVI before PHY en
Zaeem Mohamed
zaeem.mohamed at amd.com
Fri May 31 16:51:40 UTC 2024
From: Alvin Lee <alvin.lee2 at amd.com>
[Description]
In newer DCN's the programming of SYMCLK_FE_SRC_SEL depends on
the value of DIG_FE_SOURCE_SELECT. If DIG_FE_SOURCE_SELECT is not
already programmed at the time of PHY / DIG enable then the FW
sequence will program an incorrect SYMCLK source. Ensure that we
program DIG_FE_SOURCE_SELECT for all DIO scenarios (DVI in this
particular case) before going through the PHY / DIG enable sequence.
Reviewed-by: Wenjing Liu <wenjing.liu at amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed at amd.com>
Signed-off-by: Alvin Lee <alvin.lee2 at amd.com>
---
drivers/gpu/drm/amd/display/dc/link/link_dpms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index a9ddbe12142f..65607589495f 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -1976,7 +1976,7 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
/* We need to enable stream encoder for TMDS first to apply 1/4 TMDS
* character clock in case that beyond 340MHz.
*/
- if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))
+ if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal) || dc_is_dvi_signal(pipe_ctx->stream->signal))
link_hwss->setup_stream_encoder(pipe_ctx);
dc->hwss.enable_tmds_link_output(
--
2.34.1
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