[PATCH] drm/amdgpu: Normalize reg offsets on VCN v4.0.3

[Sundararaju, Sathishkumar]

[AMD Official Use Only - AMD Internal Distribution Only]

Please ignore this patch , there is an unintended new line added, will remove it.

Regards,
Sathish

-----Original Message-----
From: Sundararaju, Sathishkumar <Sathishkumar.Sundararaju at amd.com>
Sent: Tuesday, November 5, 2024 12:06 PM
To: amd-gfx at lists.freedesktop.org
Cc: Liu, Leo <Leo.Liu at amd.com>; Sundararaju, Sathishkumar <Sathishkumar.Sundararaju at amd.com>
Subject: [PATCH] drm/amdgpu: Normalize reg offsets on VCN v4.0.3

Remote access to external AIDs isn't possible with VCN RRMT disabled and it is disabled on SoCs with GC 9.4.4, so use only local offsets.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 8a1db8b33ea0..96263afb3fd4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
@@ -95,6 +95,13 @@ static void vcn_v4_0_3_unified_ring_set_wptr(struct amdgpu_ring *ring);  static void vcn_v4_0_3_set_ras_funcs(struct amdgpu_device *adev);  static void vcn_v4_0_3_enable_ras(struct amdgpu_device *adev,
                                  int inst_idx, bool indirect);
+
+static inline bool vcn_v4_0_3_normalizn_reqd(struct amdgpu_device
+*adev) {
+       return (amdgpu_sriov_vf(adev) ||
+               (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4))); }
+
 /**
  * vcn_v4_0_3_early_init - set function pointers
  *
@@ -589,6 +596,7 @@ static void vcn_v4_0_3_disable_clock_gating(struct amdgpu_device *adev, int inst
                | UVD_CGC_GATE__LRBBM_MASK
                | UVD_CGC_GATE__WCB_MASK
                | UVD_CGC_GATE__VCPU_MASK
+
                | UVD_CGC_GATE__MMSCH_MASK);

        WREG32_SOC15(VCN, vcn_inst, regUVD_CGC_GATE, data); @@ -1432,8 +1440,8 @@ static uint64_t vcn_v4_0_3_unified_ring_get_wptr(struct amdgpu_ring *ring)  static void vcn_v4_0_3_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
                                uint32_t val, uint32_t mask)
 {
-       /* For VF, only local offsets should be used */
-       if (amdgpu_sriov_vf(ring->adev))
+       /* Use normalized offsets when required */
+       if (vcn_v4_0_3_normalizn_reqd(ring->adev))
                reg = NORMALIZE_VCN_REG_OFFSET(reg);

        amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT); @@ -1444,8 +1452,8 @@ static void vcn_v4_0_3_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t

 static void vcn_v4_0_3_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)  {
-       /* For VF, only local offsets should be used */
-       if (amdgpu_sriov_vf(ring->adev))
+       /* Use normalized offsets when required */
+       if (vcn_v4_0_3_normalizn_reqd(ring->adev))
                reg = NORMALIZE_VCN_REG_OFFSET(reg);

        amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE);
--
2.25.1