[PATCH] drm/amd: Fix initialization mistake for NBIO 7.7.0

Alex Deucher alexdeucher at gmail.com
Tue Nov 12 16:36:12 UTC 2024


On Tue, Nov 12, 2024 at 11:13 AM Mario Limonciello
<mario.limonciello at amd.com> wrote:
>
> From: Vijendar Mukunda <Vijendar.Mukunda at amd.com>
>
> There is a strapping issue on NBIO 7.7.0 that can lead to spurious PME
> events while in the D0 state.
>
> Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda at amd.com>
> Co-developed-by: Mario Limonciello <mario.limonciello at amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
> index fb37e354a9d5..1ac730328516 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
> @@ -247,6 +247,12 @@ static void nbio_v7_7_init_registers(struct amdgpu_device *adev)
>         if (def != data)
>                 WREG32_SOC15(NBIO, 0, regBIF0_PCIE_MST_CTRL_3, data);
>
> +       switch (adev->ip_versions[NBIO_HWIP][0]) {
> +       case IP_VERSION(7, 7, 0):
> +               data = RREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4) & ~BIT(23);
> +               WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4, data);
> +               break;
> +       }
>  }
>
>  static void nbio_v7_7_update_medium_grain_clock_gating(struct amdgpu_device *adev,
> --
> 2.34.1
>


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