[PATCH] drm/amd/pm: disable pcie speed switching on Intel platform for smu v14.0.2/3

[Lazar, Lijo]

On 11/18/2024 1:31 PM, Kenneth Feng wrote:
> disable pcie speed switching on Intel platform for smu v14.0.2/3
> based on Intel's requirement.
> 
> Signed-off-by: Kenneth Feng <kenneth.feng at amd.com>
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> index 59b369eff30f..337d3312ef30 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> @@ -1472,6 +1472,14 @@ static int smu_v14_0_2_update_pcie_parameters(struct smu_context *smu,
>  		if (pcie_table->pcie_lane[i] > pcie_width_cap)
>  			pcie_table->pcie_lane[i] = pcie_width_cap;
>  
> +		if (i < pcie_table->num_of_link_levels - 1 &&
> +			!(smu->adev->pm.pp_feature & PP_PCIE_DPM_MASK)) {
> +			if (pcie_table->pcie_gen[i] < pcie_gen_cap)
> +				pcie_table->pcie_gen[i] = pcie_gen_cap;
> +			if (pcie_table->pcie_lane[i] < pcie_width_cap)
> +				pcie_table->pcie_lane[i] = pcie_width_cap;
> +		}

Looking at smu_v13 code, we choose the minimum of platform supported vs
device supported and assign that to all levels.

if (pcie_table->pcie_gen[num_of_levels - 1] < pcie_gen_cap)
                        pcie_gen_cap =
pcie_table->pcie_gen[num_of_levels - 1];

Here it's selecting platform supported for all lower levels.

Thanks,
Lijo

> +
>  		smu_pcie_arg = i << 16;
>  		smu_pcie_arg |= pcie_table->pcie_gen[i] << 8;
>  		smu_pcie_arg |= pcie_table->pcie_lane[i];