[PATCH] drm/amdgpu: Add gpu_addr support to seq64 allocation

Christian König christian.koenig at amd.com
Mon Oct 21 10:10:50 UTC 2024


Hi Arun,

yeah better to make this here part of the userq fence patch set.

Regards,
Christian.

Am 21.10.24 um 11:54 schrieb Paneer Selvam, Arunpravin:
> Hi Christian,
>
> I couldn't find other users except userq fence driver which are not 
> yet pushed into amd-staging-drm-next.
> Should we wait and push along with userq fence patches or we can push 
> this one separately.
>
> Thanks,
> Arun.
>
> On 10/18/2024 7:09 PM, Christian König wrote:
>> Am 18.10.24 um 15:26 schrieb Arunpravin Paneer Selvam:
>>> Add gpu address support to seq64 alloc function.
>>
>> Looks good to me, but when adding interfaces you should probably have 
>> the user of this in the same patch set.
>>
>> Regards,
>> Christian.
>>
>>>
>>> Signed-off-by: Arunpravin Paneer Selvam 
>>> <Arunpravin.PaneerSelvam at amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c | 10 ++++++++--
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h |  3 ++-
>>>   2 files changed, 10 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c
>>> index e22cb2b5cd92..0defad71044c 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c
>>> @@ -163,7 +163,8 @@ void amdgpu_seq64_unmap(struct amdgpu_device 
>>> *adev, struct amdgpu_fpriv *fpriv)
>>>    * Returns:
>>>    * 0 on success or a negative error code on failure
>>>    */
>>> -int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va, u64 
>>> **cpu_addr)
>>> +int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va,
>>> +               u64 *gpu_addr, u64 **cpu_addr)
>>>   {
>>>       unsigned long bit_pos;
>>>   @@ -172,7 +173,12 @@ int amdgpu_seq64_alloc(struct amdgpu_device 
>>> *adev, u64 *va, u64 **cpu_addr)
>>>           return -ENOSPC;
>>>         __set_bit(bit_pos, adev->seq64.used);
>>> +
>>>       *va = bit_pos * sizeof(u64) + amdgpu_seq64_get_va_base(adev);
>>> +
>>> +    if (gpu_addr)
>>> +        *gpu_addr = bit_pos * sizeof(u64) + adev->seq64.gpu_addr;
>>> +
>>>       *cpu_addr = bit_pos + adev->seq64.cpu_base_addr;
>>>         return 0;
>>> @@ -233,7 +239,7 @@ int amdgpu_seq64_init(struct amdgpu_device *adev)
>>>        */
>>>       r = amdgpu_bo_create_kernel(adev, AMDGPU_VA_RESERVED_SEQ64_SIZE,
>>>                       PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
>>> -                    &adev->seq64.sbo, NULL,
>>> +                    &adev->seq64.sbo, &adev->seq64.gpu_addr,
>>>                       (void **)&adev->seq64.cpu_base_addr);
>>>       if (r) {
>>>           dev_warn(adev->dev, "(%d) create seq64 failed\n", r);
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h
>>> index 4203b2ab318d..26a249aaaee1 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h
>>> @@ -32,13 +32,14 @@
>>>   struct amdgpu_seq64 {
>>>       struct amdgpu_bo *sbo;
>>>       u32 num_sem;
>>> +    u64 gpu_addr;
>>>       u64 *cpu_base_addr;
>>>       DECLARE_BITMAP(used, AMDGPU_MAX_SEQ64_SLOTS);
>>>   };
>>>     void amdgpu_seq64_fini(struct amdgpu_device *adev);
>>>   int amdgpu_seq64_init(struct amdgpu_device *adev);
>>> -int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *gpu_addr, 
>>> u64 **cpu_addr);
>>> +int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va, u64 
>>> *gpu_addr, u64 **cpu_addr);
>>>   void amdgpu_seq64_free(struct amdgpu_device *adev, u64 gpu_addr);
>>>   int amdgpu_seq64_map(struct amdgpu_device *adev, struct amdgpu_vm 
>>> *vm,
>>>                struct amdgpu_bo_va **bo_va);
>>
>



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