[PATCH] drm/amd : Update MES API header file for v11 & v12
Alex Deucher
alexdeucher at gmail.com
Thu Oct 24 13:37:24 UTC 2024
On Thu, Oct 24, 2024 at 9:31 AM Alex Deucher <alexdeucher at gmail.com> wrote:
>
> On Mon, Oct 21, 2024 at 10:11 PM Shaoyun Liu <shaoyun.liu at amd.com> wrote:
> >
> > New features require the new fields defines
> >
> > Signed-off-by: Shaoyun Liu <shaoyun.liu at amd.com>
> > ---
> > drivers/gpu/drm/amd/include/mes_v11_api_def.h | 32 ++++++++++++++++-
> > drivers/gpu/drm/amd/include/mes_v12_api_def.h | 34 ++++++++++++++++++-
> > 2 files changed, 64 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> > index 21ceafce1f9b..663f368eb4f0 100644
> > --- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> > +++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> > @@ -230,13 +230,23 @@ union MESAPI_SET_HW_RESOURCES {
> > uint32_t disable_add_queue_wptr_mc_addr : 1;
> > uint32_t enable_mes_event_int_logging : 1;
> > uint32_t enable_reg_active_poll : 1;
> > - uint32_t reserved : 21;
> > + uint32_t use_disable_queue_in_legacy_uq_preemption : 1;
> > + uint32_t send_write_data : 1;
> > + uint32_t os_tdr_timeout_override : 1;
> > + uint32_t use_rs64mem_for_proc_gang_ctx : 1;
> > + uint32_t use_add_queue_unmap_flag_addr : 1;
> > + uint32_t enable_mes_sch_stb_log : 1;
> > + uint32_t limit_single_process : 1;
> > + uint32_t is_strix_tmz_wa_enabled :1;
> > + uint32_t reserved : 13;
> > };
> > uint32_t uint32_t_all;
> > };
> > uint32_t oversubscription_timer;
> > uint64_t doorbell_info;
> > uint64_t event_intr_history_gpu_mc_ptr;
> > + uint64_t timestamp;
> > + uint32_t os_tdr_timeout_in_sec;
>
> Will this change break backwards compatibility? It changes the size
> of the packet.
Nevermind, the packets are always of size API_FRAME_SIZE_IN_DWORDS.
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Alex
>
> Alex
>
> > };
> >
> > uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
> > @@ -563,6 +573,11 @@ enum MESAPI_MISC_OPCODE {
> > MESAPI_MISC__READ_REG,
> > MESAPI_MISC__WAIT_REG_MEM,
> > MESAPI_MISC__SET_SHADER_DEBUGGER,
> > + MESAPI_MISC__NOTIFY_WORK_ON_UNMAPPED_QUEUE,
> > + MESAPI_MISC__NOTIFY_TO_UNMAP_PROCESSES,
> > + MESAPI_MISC__CHANGE_CONFIG,
> > + MESAPI_MISC__LAUNCH_CLEANER_SHADER,
> > +
> > MESAPI_MISC__MAX,
> > };
> >
> > @@ -617,6 +632,20 @@ struct SET_SHADER_DEBUGGER {
> > uint32_t trap_en;
> > };
> >
> > +struct CHANGE_CONFIG
> > +{
> > + union
> > + {
> > + struct
> > + {
> > + uint32_t limit_single_process : 1;
> > + uint32_t reserved : 31;
> > + }bits;
> > + uint32_t all;
> > + }option;
> > +};
> > +
> > +
> > union MESAPI__MISC {
> > struct {
> > union MES_API_HEADER header;
> > @@ -631,6 +660,7 @@ union MESAPI__MISC {
> > struct WAIT_REG_MEM wait_reg_mem;
> > struct SET_SHADER_DEBUGGER set_shader_debugger;
> > enum MES_AMD_PRIORITY_LEVEL queue_sch_level;
> > + struct CHANGE_CONFIG change_config;
> >
> > uint32_t data[MISC_DATA_MAX_SIZE_IN_DWORDS];
> > };
> > diff --git a/drivers/gpu/drm/amd/include/mes_v12_api_def.h b/drivers/gpu/drm/amd/include/mes_v12_api_def.h
> > index 101e2fe962c6..62df832810ca 100644
> > --- a/drivers/gpu/drm/amd/include/mes_v12_api_def.h
> > +++ b/drivers/gpu/drm/amd/include/mes_v12_api_def.h
> > @@ -643,6 +643,10 @@ enum MESAPI_MISC_OPCODE {
> > MESAPI_MISC__SET_SHADER_DEBUGGER,
> > MESAPI_MISC__NOTIFY_WORK_ON_UNMAPPED_QUEUE,
> > MESAPI_MISC__NOTIFY_TO_UNMAP_PROCESSES,
> > + MESAPI_MISC__QUERY_HUNG_ENGINE_ID,
> > + MESAPI_MISC__CHANGE_CONFIG,
> > + MESAPI_MISC__LAUNCH_CLEANER_SHADER,
> > + MESAPI_MISC__SETUP_MES_DBGEXT,
> >
> > MESAPI_MISC__MAX,
> > };
> > @@ -713,6 +717,34 @@ struct SET_GANG_SUBMIT {
> > uint32_t slave_gang_context_array_index;
> > };
> >
> > +enum MESAPI_MISC__CHANGE_CONFIG_OPTION
> > +{
> > + MESAPI_MISC__CHANGE_CONFIG_OPTION_LIMIT_SINGLE_PROCESS = 0,
> > + MESAPI_MISC__CHANGE_CONFIG_OPTION_ENABLE_HWS_LOGGING_BUFFER = 1,
> > + MESAPI_MISC__CHANGE_CONFIG_OPTION_CHANGE_TDR_CONFIG = 2,
> > +
> > + MESAPI_MISC__CHANGE_CONFIG_OPTION_MAX = 0x1F
> > +};
> > +
> > +struct CHANGE_CONFIG
> > +{
> > + enum MESAPI_MISC__CHANGE_CONFIG_OPTION opcode;
> > + union {
> > + struct {
> > + uint32_t limit_single_process : 1;
> > + uint32_t enable_hws_logging_buffer : 1;
> > + uint32_t reserved : 30;
> > + }bits;
> > + uint32_t all;
> > + } option;
> > +
> > + struct {
> > + uint32_t tdr_level;
> > + uint32_t tdr_delay;
> > + } tdr_config;
> > +};
> > +
> > +
> > union MESAPI__MISC {
> > struct {
> > union MES_API_HEADER header;
> > @@ -726,7 +758,7 @@ union MESAPI__MISC {
> > struct WAIT_REG_MEM wait_reg_mem;
> > struct SET_SHADER_DEBUGGER set_shader_debugger;
> > enum MES_AMD_PRIORITY_LEVEL queue_sch_level;
> > -
> > + struct CHANGE_CONFIG change_config;
> > uint32_t data[MISC_DATA_MAX_SIZE_IN_DWORDS];
> > };
> > uint64_t timestamp;
> > --
> > 2.34.1
> >
More information about the amd-gfx
mailing list