[PATCH] drm/amdgpu: add get_gfx_shadow_info callback for gfx12

Alex Deucher alexdeucher at gmail.com
Thu Oct 24 20:19:12 UTC 2024


On Thu, Oct 24, 2024 at 12:59 PM Shashank Sharma
<shashank.sharma at amd.com> wrote:
>
> This callback gets the size and alignment requirements
> for the gfx shadow buffer for preemption.
>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Cc: Christian Koenig <christian.koenig at amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 29 ++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> index 02244bd2c418..0ac0222b178c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> @@ -860,6 +860,34 @@ static void gfx_v12_0_select_me_pipe_q(struct amdgpu_device *adev,
>         soc24_grbm_select(adev, me, pipe, q, vm);
>  }
>
> +/* all sizes are in bytes */
> +#define MQD_SHADOW_BASE_SIZE      73728
> +#define MQD_SHADOW_BASE_ALIGNMENT 256
> +#define MQD_FWWORKAREA_SIZE       484
> +#define MQD_FWWORKAREA_ALIGNMENT  256
> +
> +static void gfx_v12_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev,
> +                                                 struct amdgpu_gfx_shadow_info *shadow_info)
> +{
> +       shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
> +       shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
> +       shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
> +       shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
> +}
> +
> +static int gfx_v12_0_get_gfx_shadow_info(struct amdgpu_device *adev,
> +                                        struct amdgpu_gfx_shadow_info *shadow_info,
> +                                        bool skip_check)
> +{
> +       if (adev->gfx.cp_gfx_shadow || skip_check) {
> +               gfx_v12_0_get_gfx_shadow_info_nocheck(adev, shadow_info);
> +               return 0;
> +       }
> +
> +       memset(shadow_info, 0, sizeof(struct amdgpu_gfx_shadow_info));
> +       return -EINVAL;
> +}
> +
>  static const struct amdgpu_gfx_funcs gfx_v12_0_gfx_funcs = {
>         .get_gpu_clock_counter = &gfx_v12_0_get_gpu_clock_counter,
>         .select_se_sh = &gfx_v12_0_select_se_sh,
> @@ -868,6 +896,7 @@ static const struct amdgpu_gfx_funcs gfx_v12_0_gfx_funcs = {
>         .read_wave_vgprs = &gfx_v12_0_read_wave_vgprs,
>         .select_me_pipe_q = &gfx_v12_0_select_me_pipe_q,
>         .update_perfmon_mgcg = &gfx_v12_0_update_perf_clk,
> +       .get_gfx_shadow_info = &gfx_v12_0_get_gfx_shadow_info,
>  };
>
>  static int gfx_v12_0_gpu_early_init(struct amdgpu_device *adev)
> --
> 2.46.2
>


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