[PATCH 11/29] drm/amdgpu/vcn: separate gating state by instance
boyuan.zhang at amd.com
boyuan.zhang at amd.com
Fri Oct 25 02:35:27 UTC 2024
From: Boyuan Zhang <boyuan.zhang at amd.com>
vcn gating state should now be based on instance. For example, instance 0
can be gated while instance 1 is ungated, or vice versa.
Therefore, change the cur_state to be an array, so that it can track the
gating status for each vcn instance now.
v2: remove redundant codes in v1.
v3: move cur_state from amdgpu_vcn to amdgou_vcn_inst since it's a per
instance variable.
Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
Reviewed-by: Christian König <christian.koenig at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 7 ++---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 9 ++++---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 28 ++++++++++----------
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 25 +++++++++---------
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 31 ++++++++++++-----------
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 10 +++++---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 24 +++++++++---------
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 24 +++++++++---------
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 3 ++-
10 files changed, 84 insertions(+), 79 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index ba58b4f07643..2b8c9b8d4494 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -298,6 +298,7 @@ struct amdgpu_vcn_inst {
struct amdgpu_vcn_fw_shared fw_shared;
uint8_t aid_id;
const struct firmware *fw; /* VCN firmware */
+ enum amd_powergating_state cur_state;
uint8_t vcn_config;
uint32_t vcn_codec_disable_mask;
};
@@ -310,7 +311,6 @@ struct amdgpu_vcn {
unsigned fw_version;
struct delayed_work idle_work;
unsigned num_enc_rings;
- enum amd_powergating_state cur_state;
bool indirect_sram;
uint8_t num_vcn_inst;
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 5ea96c983517..c2eb187b0a27 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -280,7 +280,7 @@ static int vcn_v1_0_hw_fini(struct amdgpu_ip_block *ip_block)
cancel_delayed_work_sync(&adev->vcn.idle_work);
if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
+ (adev->vcn.inst[0].cur_state != AMD_PG_STATE_GATE &&
RREG32_SOC15(VCN, 0, mmUVD_STATUS))) {
vcn_v1_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
}
@@ -1813,7 +1813,7 @@ static int vcn_v1_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
int ret;
struct amdgpu_device *adev = ip_block->adev;
- if (state == adev->vcn.cur_state)
+ if (state == adev->vcn.inst[0].cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -1822,7 +1822,8 @@ static int vcn_v1_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
ret = vcn_v1_0_start(adev);
if (!ret)
- adev->vcn.cur_state = state;
+ adev->vcn.inst[0].cur_state = state;
+
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index e42cfc731ad8..04edbb368903 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -316,7 +316,7 @@ static int vcn_v2_0_hw_fini(struct amdgpu_ip_block *ip_block)
cancel_delayed_work_sync(&adev->vcn.idle_work);
if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
+ (adev->vcn.inst[0].cur_state != AMD_PG_STATE_GATE &&
RREG32_SOC15(VCN, 0, mmUVD_STATUS)))
vcn_v2_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
@@ -1810,11 +1810,11 @@ static int vcn_v2_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
struct amdgpu_device *adev = ip_block->adev;
if (amdgpu_sriov_vf(adev)) {
- adev->vcn.cur_state = AMD_PG_STATE_UNGATE;
+ adev->vcn.inst[0].cur_state = AMD_PG_STATE_UNGATE;
return 0;
}
- if (state == adev->vcn.cur_state)
+ if (state == adev->vcn.inst[0].cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -1823,7 +1823,8 @@ static int vcn_v2_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
ret = vcn_v2_0_start(adev);
if (!ret)
- adev->vcn.cur_state = state;
+ adev->vcn.inst[0].cur_state = state;
+
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index b518202955ca..a14b634c433c 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -388,23 +388,22 @@ static int vcn_v2_5_hw_init(struct amdgpu_ip_block *ip_block)
static int vcn_v2_5_hw_fini(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i;
+ int inst = ip_block->instance;
cancel_delayed_work_sync(&adev->vcn.idle_work);
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
-
- if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
- RREG32_SOC15(VCN, i, mmUVD_STATUS)))
- vcn_v2_5_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
+ if (adev->vcn.harvest_config & (1 << inst))
+ return 0;
- if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN))
- amdgpu_irq_put(adev, &adev->vcn.inst[i].ras_poison_irq, 0);
+ if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
+ (adev->vcn.inst[inst].cur_state != AMD_PG_STATE_GATE &&
+ RREG32_SOC15(VCN, inst, mmUVD_STATUS))) {
+ vcn_v2_5_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
}
+ if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN))
+ amdgpu_irq_put(adev, &adev->vcn.inst[inst].ras_poison_irq, 0);
+
return 0;
}
@@ -1830,12 +1829,13 @@ static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
enum amd_powergating_state state)
{
struct amdgpu_device *adev = ip_block->adev;
+ int inst = ip_block->instance;
int ret;
if (amdgpu_sriov_vf(adev))
return 0;
- if(state == adev->vcn.cur_state)
+ if (state == adev->vcn.inst[inst].cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -1843,8 +1843,8 @@ static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
else
ret = vcn_v2_5_start(adev);
- if(!ret)
- adev->vcn.cur_state = state;
+ if (!ret)
+ adev->vcn.inst[inst].cur_state = state;
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 63ddd4cca910..3b38b67f6da2 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -420,20 +420,18 @@ static int vcn_v3_0_hw_init(struct amdgpu_ip_block *ip_block)
static int vcn_v3_0_hw_fini(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i;
+ int inst = ip_block->instance;
cancel_delayed_work_sync(&adev->vcn.idle_work);
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
+ if (adev->vcn.harvest_config & (1 << inst))
+ return 0;
- if (!amdgpu_sriov_vf(adev)) {
- if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
- RREG32_SOC15(VCN, i, mmUVD_STATUS))) {
- vcn_v3_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
- }
+ if (!amdgpu_sriov_vf(adev)) {
+ if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
+ (adev->vcn.inst[inst].cur_state != AMD_PG_STATE_GATE &&
+ RREG32_SOC15(VCN, inst, mmUVD_STATUS))) {
+ vcn_v3_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
}
}
@@ -2163,6 +2161,7 @@ static int vcn_v3_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
enum amd_powergating_state state)
{
struct amdgpu_device *adev = ip_block->adev;
+ int inst = ip_block->instance;
int ret;
/* for SRIOV, guest should not control VCN Power-gating
@@ -2170,11 +2169,11 @@ static int vcn_v3_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
* guest should avoid touching CGC and PG
*/
if (amdgpu_sriov_vf(adev)) {
- adev->vcn.cur_state = AMD_PG_STATE_UNGATE;
+ adev->vcn.inst[inst].cur_state = AMD_PG_STATE_UNGATE;
return 0;
}
- if (state == adev->vcn.cur_state)
+ if (state == adev->vcn.inst[inst].cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -2183,7 +2182,7 @@ static int vcn_v3_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
ret = vcn_v3_0_start(adev);
if (!ret)
- adev->vcn.cur_state = state;
+ adev->vcn.inst[inst].cur_state = state;
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index 1a6257d324c9..87c8f1c084a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -348,24 +348,24 @@ static int vcn_v4_0_hw_init(struct amdgpu_ip_block *ip_block)
static int vcn_v4_0_hw_fini(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i;
+ int inst = ip_block->instance;
cancel_delayed_work_sync(&adev->vcn.idle_work);
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
- if (!amdgpu_sriov_vf(adev)) {
- if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
- RREG32_SOC15(VCN, i, regUVD_STATUS))) {
- vcn_v4_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
- }
+ if (adev->vcn.harvest_config & (1 << inst))
+ return 0;
+
+ if (!amdgpu_sriov_vf(adev)) {
+ if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
+ (adev->vcn.inst[inst].cur_state != AMD_PG_STATE_GATE &&
+ RREG32_SOC15(VCN, inst, regUVD_STATUS))) {
+ vcn_v4_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
}
- if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN))
- amdgpu_irq_put(adev, &adev->vcn.inst[i].ras_poison_irq, 0);
}
+ if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN))
+ amdgpu_irq_put(adev, &adev->vcn.inst[inst].ras_poison_irq, 0);
+
return 0;
}
@@ -2042,6 +2042,7 @@ static int vcn_v4_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
enum amd_powergating_state state)
{
struct amdgpu_device *adev = ip_block->adev;
+ int inst = ip_block->instance;
int ret;
/* for SRIOV, guest should not control VCN Power-gating
@@ -2049,11 +2050,11 @@ static int vcn_v4_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
* guest should avoid touching CGC and PG
*/
if (amdgpu_sriov_vf(adev)) {
- adev->vcn.cur_state = AMD_PG_STATE_UNGATE;
+ adev->vcn.inst[inst].cur_state = AMD_PG_STATE_UNGATE;
return 0;
}
- if (state == adev->vcn.cur_state)
+ if (state == adev->vcn.inst[inst].cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -2062,7 +2063,7 @@ static int vcn_v4_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
ret = vcn_v4_0_start(adev);
if (!ret)
- adev->vcn.cur_state = state;
+ adev->vcn.inst[inst].cur_state = state;
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 23a2a80129bb..8e7d7318cf58 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
@@ -315,10 +315,11 @@ static int vcn_v4_0_3_hw_init(struct amdgpu_ip_block *ip_block)
static int vcn_v4_0_3_hw_fini(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
+ int inst = ip_block->instance;
cancel_delayed_work_sync(&adev->vcn.idle_work);
- if (adev->vcn.cur_state != AMD_PG_STATE_GATE)
+ if (adev->vcn.inst[inst].cur_state != AMD_PG_STATE_GATE)
vcn_v4_0_3_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
return 0;
@@ -1627,6 +1628,7 @@ static int vcn_v4_0_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
enum amd_powergating_state state)
{
struct amdgpu_device *adev = ip_block->adev;
+ int inst = ip_block->instance;
int ret;
/* for SRIOV, guest should not control VCN Power-gating
@@ -1634,11 +1636,11 @@ static int vcn_v4_0_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
* guest should avoid touching CGC and PG
*/
if (amdgpu_sriov_vf(adev)) {
- adev->vcn.cur_state = AMD_PG_STATE_UNGATE;
+ adev->vcn.inst[inst].cur_state = AMD_PG_STATE_UNGATE;
return 0;
}
- if (state == adev->vcn.cur_state)
+ if (state == adev->vcn.inst[inst].cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -1647,7 +1649,7 @@ static int vcn_v4_0_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
ret = vcn_v4_0_3_start(adev);
if (!ret)
- adev->vcn.cur_state = state;
+ adev->vcn.inst[inst].cur_state = state;
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
index e49ba5bc7fa0..9c5257f370f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
@@ -298,19 +298,18 @@ static int vcn_v4_0_5_hw_init(struct amdgpu_ip_block *ip_block)
static int vcn_v4_0_5_hw_fini(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i;
+ int inst = ip_block->instance;
cancel_delayed_work_sync(&adev->vcn.idle_work);
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
- if (!amdgpu_sriov_vf(adev)) {
- if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
- RREG32_SOC15(VCN, i, regUVD_STATUS))) {
- vcn_v4_0_5_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
- }
+ if (adev->vcn.harvest_config & (1 << inst))
+ return 0;
+
+ if (!amdgpu_sriov_vf(adev)) {
+ if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
+ (adev->vcn.inst[inst].cur_state != AMD_PG_STATE_GATE &&
+ RREG32_SOC15(VCN, inst, regUVD_STATUS))) {
+ vcn_v4_0_5_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
}
}
@@ -1536,9 +1535,10 @@ static int vcn_v4_0_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
enum amd_powergating_state state)
{
struct amdgpu_device *adev = ip_block->adev;
+ int inst = ip_block->instance;
int ret;
- if (state == adev->vcn.cur_state)
+ if (state == adev->vcn.inst[inst].cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -1547,7 +1547,7 @@ static int vcn_v4_0_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
ret = vcn_v4_0_5_start(adev);
if (!ret)
- adev->vcn.cur_state = state;
+ adev->vcn.inst[inst].cur_state = state;
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
index 900ca8ababc1..4ecf0aea156f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
@@ -262,19 +262,18 @@ static int vcn_v5_0_0_hw_init(struct amdgpu_ip_block *ip_block)
static int vcn_v5_0_0_hw_fini(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i;
+ int inst = ip_block->instance;
cancel_delayed_work_sync(&adev->vcn.idle_work);
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
- if (!amdgpu_sriov_vf(adev)) {
- if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
- RREG32_SOC15(VCN, i, regUVD_STATUS))) {
- vcn_v5_0_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
- }
+ if (adev->vcn.harvest_config & (1 << inst))
+ return 0;
+
+ if (!amdgpu_sriov_vf(adev)) {
+ if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
+ (adev->vcn.inst[inst].cur_state != AMD_PG_STATE_GATE &&
+ RREG32_SOC15(VCN, inst, regUVD_STATUS))) {
+ vcn_v5_0_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
}
}
@@ -1263,9 +1262,10 @@ static int vcn_v5_0_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
enum amd_powergating_state state)
{
struct amdgpu_device *adev = ip_block->adev;
+ int inst = ip_block->instance;
int ret;
- if (state == adev->vcn.cur_state)
+ if (state == adev->vcn.inst[inst].cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -1274,7 +1274,7 @@ static int vcn_v5_0_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
ret = vcn_v5_0_0_start(adev);
if (!ret)
- adev->vcn.cur_state = state;
+ adev->vcn.inst[inst].cur_state = state;
return ret;
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 6f2b8ef07a41..0dd9bcc54e95 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2048,7 +2048,8 @@ static int smu_hw_fini(struct amdgpu_ip_block *ip_block)
smu_dpm_set_vpe_enable(smu, false);
smu_dpm_set_umsch_mm_enable(smu, false);
- adev->vcn.cur_state = AMD_PG_STATE_GATE;
+ for (int i = 0; i < adev->vcn.num_vcn_inst; ++i)
+ adev->vcn.inst[i].cur_state = AMD_PG_STATE_GATE;
adev->jpeg.cur_state = AMD_PG_STATE_GATE;
if (!smu->pm_enabled)
--
2.34.1
More information about the amd-gfx
mailing list