[PATCH 27/29] drm/amdgpu: set funcs for each vcn instance
Alex Deucher
alexdeucher at gmail.com
Mon Oct 28 19:44:12 UTC 2024
On Thu, Oct 24, 2024 at 11:13 PM <boyuan.zhang at amd.com> wrote:
>
> From: Boyuan Zhang <boyuan.zhang at amd.com>
>
> Pass instance parameter to set_dec_ring_funcs(), set_enc_ring_funcs(),
> and set_irq_funcs(), and perform function setup ONLY for the given vcn
> instance, instead of for all vcn instances. Modify each vcn generation
> accordingly.
>
> Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
> Reviewed-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 59 +++++++++++------------
> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 62 +++++++++++--------------
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 46 ++++++++----------
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 31 ++++++-------
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 36 ++++++--------
> drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 36 ++++++--------
> 6 files changed, 112 insertions(+), 158 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> index 0d84cb4279e3..2e5888b905fb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> @@ -92,9 +92,9 @@ static const struct amdgpu_hwip_reg_entry vcn_reg_list_2_5[] = {
> SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_PAUSE)
> };
>
> -static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev);
> -static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev);
> -static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev);
> +static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev, int inst);
> +static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev, int inst);
> +static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev, int inst);
> static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
> @@ -139,9 +139,9 @@ static int vcn_v2_5_early_init(struct amdgpu_ip_block *ip_block)
> adev->vcn.num_enc_rings = 2;
> }
>
> - vcn_v2_5_set_dec_ring_funcs(adev);
> - vcn_v2_5_set_enc_ring_funcs(adev);
> - vcn_v2_5_set_irq_funcs(adev);
> + vcn_v2_5_set_dec_ring_funcs(adev, inst);
> + vcn_v2_5_set_enc_ring_funcs(adev, inst);
> + vcn_v2_5_set_irq_funcs(adev, inst);
> vcn_v2_5_set_ras_funcs(adev);
>
> return amdgpu_vcn_early_init(adev, inst);
> @@ -1737,29 +1737,25 @@ static const struct amdgpu_ring_funcs vcn_v2_5_enc_ring_vm_funcs = {
> .emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,
> };
>
> -static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev)
> +static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> - adev->vcn.inst[i].ring_dec.funcs = &vcn_v2_5_dec_ring_vm_funcs;
> - adev->vcn.inst[i].ring_dec.me = i;
> - }
> + adev->vcn.inst[inst].ring_dec.funcs = &vcn_v2_5_dec_ring_vm_funcs;
> + adev->vcn.inst[inst].ring_dec.me = inst;
> }
>
> -static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev)
> +static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i, j;
> + int i;
>
> - for (j = 0; j < adev->vcn.num_vcn_inst; ++j) {
> - if (adev->vcn.harvest_config & (1 << j))
> - continue;
> - for (i = 0; i < adev->vcn.num_enc_rings; ++i) {
> - adev->vcn.inst[j].ring_enc[i].funcs = &vcn_v2_5_enc_ring_vm_funcs;
> - adev->vcn.inst[j].ring_enc[i].me = j;
> - }
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
> +
> + for (i = 0; i < adev->vcn.num_enc_rings; ++i) {
> + adev->vcn.inst[inst].ring_enc[i].funcs = &vcn_v2_5_enc_ring_vm_funcs;
> + adev->vcn.inst[inst].ring_enc[i].me = inst;
> }
> }
>
> @@ -1904,19 +1900,16 @@ static const struct amdgpu_irq_src_funcs vcn_v2_6_ras_irq_funcs = {
> .process = amdgpu_vcn_process_poison_irq,
> };
>
> -static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev)
> +static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> - adev->vcn.inst[i].irq.num_types = adev->vcn.num_enc_rings + 1;
> - adev->vcn.inst[i].irq.funcs = &vcn_v2_5_irq_funcs;
> + adev->vcn.inst[inst].irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.inst[inst].irq.funcs = &vcn_v2_5_irq_funcs;
>
> - adev->vcn.inst[i].ras_poison_irq.num_types = adev->vcn.num_enc_rings + 1;
> - adev->vcn.inst[i].ras_poison_irq.funcs = &vcn_v2_6_ras_irq_funcs;
> - }
> + adev->vcn.inst[inst].ras_poison_irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.inst[inst].ras_poison_irq.funcs = &vcn_v2_6_ras_irq_funcs;
> }
>
> static void vcn_v2_5_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p)
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index 03fc50b3aa05..0d1c1534db40 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -102,9 +102,9 @@ static int amdgpu_ih_clientid_vcns[] = {
> };
>
> static int vcn_v3_0_start_sriov(struct amdgpu_device *adev);
> -static void vcn_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev);
> -static void vcn_v3_0_set_enc_ring_funcs(struct amdgpu_device *adev);
> -static void vcn_v3_0_set_irq_funcs(struct amdgpu_device *adev);
> +static void vcn_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev, int inst);
> +static void vcn_v3_0_set_enc_ring_funcs(struct amdgpu_device *adev, int inst);
> +static void vcn_v3_0_set_irq_funcs(struct amdgpu_device *adev, int inst);
> static int vcn_v3_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> static int vcn_v3_0_pause_dpg_mode(struct amdgpu_device *adev,
> @@ -144,9 +144,9 @@ static int vcn_v3_0_early_init(struct amdgpu_ip_block *ip_block)
> adev->vcn.num_enc_rings = 2;
> }
>
> - vcn_v3_0_set_dec_ring_funcs(adev);
> - vcn_v3_0_set_enc_ring_funcs(adev);
> - vcn_v3_0_set_irq_funcs(adev);
> + vcn_v3_0_set_dec_ring_funcs(adev, inst);
> + vcn_v3_0_set_enc_ring_funcs(adev, inst);
> + vcn_v3_0_set_irq_funcs(adev, inst);
>
> return amdgpu_vcn_early_init(adev, inst);
> }
> @@ -2062,34 +2062,28 @@ static const struct amdgpu_ring_funcs vcn_v3_0_enc_ring_vm_funcs = {
> .emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,
> };
>
> -static void vcn_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev)
> +static void vcn_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - if (!DEC_SW_RING_ENABLED)
> - adev->vcn.inst[i].ring_dec.funcs = &vcn_v3_0_dec_ring_vm_funcs;
> - else
> - adev->vcn.inst[i].ring_dec.funcs = &vcn_v3_0_dec_sw_ring_vm_funcs;
> - adev->vcn.inst[i].ring_dec.me = i;
> - }
> + if (!DEC_SW_RING_ENABLED)
> + adev->vcn.inst[inst].ring_dec.funcs = &vcn_v3_0_dec_ring_vm_funcs;
> + else
> + adev->vcn.inst[inst].ring_dec.funcs = &vcn_v3_0_dec_sw_ring_vm_funcs;
> + adev->vcn.inst[inst].ring_dec.me = inst;
> }
>
> -static void vcn_v3_0_set_enc_ring_funcs(struct amdgpu_device *adev)
> +static void vcn_v3_0_set_enc_ring_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i, j;
> + int j;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - for (j = 0; j < adev->vcn.num_enc_rings; ++j) {
> - adev->vcn.inst[i].ring_enc[j].funcs = &vcn_v3_0_enc_ring_vm_funcs;
> - adev->vcn.inst[i].ring_enc[j].me = i;
> - }
> + for (j = 0; j < adev->vcn.num_enc_rings; ++j) {
> + adev->vcn.inst[inst].ring_enc[j].funcs = &vcn_v3_0_enc_ring_vm_funcs;
> + adev->vcn.inst[inst].ring_enc[j].me = inst;
> }
> }
>
> @@ -2231,17 +2225,13 @@ static const struct amdgpu_irq_src_funcs vcn_v3_0_irq_funcs = {
> .process = vcn_v3_0_process_interrupt,
> };
>
> -static void vcn_v3_0_set_irq_funcs(struct amdgpu_device *adev)
> +static void vcn_v3_0_set_irq_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - adev->vcn.inst[i].irq.num_types = adev->vcn.num_enc_rings + 1;
> - adev->vcn.inst[i].irq.funcs = &vcn_v3_0_irq_funcs;
> - }
> + adev->vcn.inst[inst].irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.inst[inst].irq.funcs = &vcn_v3_0_irq_funcs;
> }
>
> static void vcn_v3_0_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p)
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index c52ed8166d9d..e9a8e027d5f9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -94,8 +94,8 @@ static int amdgpu_ih_clientid_vcns[] = {
> };
>
> static int vcn_v4_0_start_sriov(struct amdgpu_device *adev);
> -static void vcn_v4_0_set_unified_ring_funcs(struct amdgpu_device *adev);
> -static void vcn_v4_0_set_irq_funcs(struct amdgpu_device *adev);
> +static void vcn_v4_0_set_unified_ring_funcs(struct amdgpu_device *adev, int inst);
> +static void vcn_v4_0_set_irq_funcs(struct amdgpu_device *adev, int inst);
> static int vcn_v4_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> static int vcn_v4_0_pause_dpg_mode(struct amdgpu_device *adev,
> @@ -127,8 +127,8 @@ static int vcn_v4_0_early_init(struct amdgpu_ip_block *ip_block)
> /* re-use enc ring as unified ring */
> adev->vcn.num_enc_rings = 1;
>
> - vcn_v4_0_set_unified_ring_funcs(adev);
> - vcn_v4_0_set_irq_funcs(adev);
> + vcn_v4_0_set_unified_ring_funcs(adev, inst);
> + vcn_v4_0_set_irq_funcs(adev, inst);
> vcn_v4_0_set_ras_funcs(adev);
>
> return amdgpu_vcn_early_init(adev, inst);
> @@ -1923,21 +1923,17 @@ static struct amdgpu_ring_funcs vcn_v4_0_unified_ring_vm_funcs = {
> *
> * Set unified ring functions
> */
> -static void vcn_v4_0_set_unified_ring_funcs(struct amdgpu_device *adev)
> +static void vcn_v4_0_set_unified_ring_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - if (amdgpu_ip_version(adev, VCN_HWIP, 0) == IP_VERSION(4, 0, 2))
> - vcn_v4_0_unified_ring_vm_funcs.secure_submission_supported = true;
> + if (amdgpu_ip_version(adev, VCN_HWIP, 0) == IP_VERSION(4, 0, 2))
> + vcn_v4_0_unified_ring_vm_funcs.secure_submission_supported = true;
>
> - adev->vcn.inst[i].ring_enc[0].funcs =
> - (const struct amdgpu_ring_funcs *)&vcn_v4_0_unified_ring_vm_funcs;
> - adev->vcn.inst[i].ring_enc[0].me = i;
> - }
> + adev->vcn.inst[inst].ring_enc[0].funcs =
> + (const struct amdgpu_ring_funcs *)&vcn_v4_0_unified_ring_vm_funcs;
> + adev->vcn.inst[inst].ring_enc[0].me = inst;
> }
>
> /**
> @@ -2135,20 +2131,16 @@ static const struct amdgpu_irq_src_funcs vcn_v4_0_ras_irq_funcs = {
> *
> * Set VCN block interrupt irq functions
> */
> -static void vcn_v4_0_set_irq_funcs(struct amdgpu_device *adev)
> +static void vcn_v4_0_set_irq_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - adev->vcn.inst[i].irq.num_types = adev->vcn.num_enc_rings + 1;
> - adev->vcn.inst[i].irq.funcs = &vcn_v4_0_irq_funcs;
> + adev->vcn.inst[inst].irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.inst[inst].irq.funcs = &vcn_v4_0_irq_funcs;
>
> - adev->vcn.inst[i].ras_poison_irq.num_types = adev->vcn.num_enc_rings + 1;
> - adev->vcn.inst[i].ras_poison_irq.funcs = &vcn_v4_0_ras_irq_funcs;
> - }
> + adev->vcn.inst[inst].ras_poison_irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.inst[inst].ras_poison_irq.funcs = &vcn_v4_0_ras_irq_funcs;
> }
>
> static void vcn_v4_0_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p)
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> index 2468a5e409c1..716bc85141cb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> @@ -85,8 +85,8 @@ static const struct amdgpu_hwip_reg_entry vcn_reg_list_4_0_3[] = {
> (offset & 0x1FFFF)
>
> static int vcn_v4_0_3_start_sriov(struct amdgpu_device *adev);
> -static void vcn_v4_0_3_set_unified_ring_funcs(struct amdgpu_device *adev);
> -static void vcn_v4_0_3_set_irq_funcs(struct amdgpu_device *adev);
> +static void vcn_v4_0_3_set_unified_ring_funcs(struct amdgpu_device *adev, int inst);
> +static void vcn_v4_0_3_set_irq_funcs(struct amdgpu_device *adev, int inst);
> static int vcn_v4_0_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> static int vcn_v4_0_3_pause_dpg_mode(struct amdgpu_device *adev,
> @@ -110,8 +110,8 @@ static int vcn_v4_0_3_early_init(struct amdgpu_ip_block *ip_block)
> /* re-use enc ring as unified ring */
> adev->vcn.num_enc_rings = 1;
>
> - vcn_v4_0_3_set_unified_ring_funcs(adev);
> - vcn_v4_0_3_set_irq_funcs(adev);
> + vcn_v4_0_3_set_unified_ring_funcs(adev, inst);
> + vcn_v4_0_3_set_irq_funcs(adev, inst);
> vcn_v4_0_3_set_ras_funcs(adev);
>
> return amdgpu_vcn_early_init(adev, inst);
> @@ -1525,17 +1525,15 @@ static const struct amdgpu_ring_funcs vcn_v4_0_3_unified_ring_vm_funcs = {
> *
> * Set unified ring functions
> */
> -static void vcn_v4_0_3_set_unified_ring_funcs(struct amdgpu_device *adev)
> +static void vcn_v4_0_3_set_unified_ring_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i, vcn_inst;
> + int vcn_inst;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_3_unified_ring_vm_funcs;
> - adev->vcn.inst[i].ring_enc[0].me = i;
> - vcn_inst = GET_INST(VCN, i);
> - adev->vcn.inst[i].aid_id =
> - vcn_inst / adev->vcn.num_inst_per_aid;
> - }
> + adev->vcn.inst[inst].ring_enc[0].funcs = &vcn_v4_0_3_unified_ring_vm_funcs;
> + adev->vcn.inst[inst].ring_enc[0].me = inst;
> + vcn_inst = GET_INST(VCN, inst);
> + adev->vcn.inst[inst].aid_id =
> + vcn_inst / adev->vcn.num_inst_per_aid;
> }
>
> /**
> @@ -1718,13 +1716,10 @@ static const struct amdgpu_irq_src_funcs vcn_v4_0_3_irq_funcs = {
> *
> * Set VCN block interrupt irq functions
> */
> -static void vcn_v4_0_3_set_irq_funcs(struct amdgpu_device *adev)
> +static void vcn_v4_0_3_set_irq_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> + adev->vcn.inst->irq.num_types++;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - adev->vcn.inst->irq.num_types++;
> - }
> adev->vcn.inst->irq.funcs = &vcn_v4_0_3_irq_funcs;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> index f43604d7fb1a..b74b2c0942c9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> @@ -93,8 +93,8 @@ static int amdgpu_ih_clientid_vcns[] = {
> SOC15_IH_CLIENTID_VCN1
> };
>
> -static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev);
> -static void vcn_v4_0_5_set_irq_funcs(struct amdgpu_device *adev);
> +static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev, int inst);
> +static void vcn_v4_0_5_set_irq_funcs(struct amdgpu_device *adev, int inst);
> static int vcn_v4_0_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> static int vcn_v4_0_5_pause_dpg_mode(struct amdgpu_device *adev,
> @@ -116,8 +116,8 @@ static int vcn_v4_0_5_early_init(struct amdgpu_ip_block *ip_block)
>
> /* re-use enc ring as unified ring */
> adev->vcn.num_enc_rings = 1;
> - vcn_v4_0_5_set_unified_ring_funcs(adev);
> - vcn_v4_0_5_set_irq_funcs(adev);
> + vcn_v4_0_5_set_unified_ring_funcs(adev, inst);
> + vcn_v4_0_5_set_irq_funcs(adev, inst);
>
> return amdgpu_vcn_early_init(adev, inst);
> }
> @@ -1424,17 +1424,13 @@ static const struct amdgpu_ring_funcs vcn_v4_0_5_unified_ring_vm_funcs = {
> *
> * Set unified ring functions
> */
> -static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev)
> +static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_5_unified_ring_vm_funcs;
> - adev->vcn.inst[i].ring_enc[0].me = i;
> - }
> + adev->vcn.inst[inst].ring_enc[0].funcs = &vcn_v4_0_5_unified_ring_vm_funcs;
> + adev->vcn.inst[inst].ring_enc[0].me = inst;
> }
>
> /**
> @@ -1599,17 +1595,13 @@ static const struct amdgpu_irq_src_funcs vcn_v4_0_5_irq_funcs = {
> *
> * Set VCN block interrupt irq functions
> */
> -static void vcn_v4_0_5_set_irq_funcs(struct amdgpu_device *adev)
> +static void vcn_v4_0_5_set_irq_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - adev->vcn.inst[i].irq.num_types = adev->vcn.num_enc_rings + 1;
> - adev->vcn.inst[i].irq.funcs = &vcn_v4_0_5_irq_funcs;
> - }
> + adev->vcn.inst[inst].irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.inst[inst].irq.funcs = &vcn_v4_0_5_irq_funcs;
> }
>
> static void vcn_v4_0_5_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p)
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> index d61428c75c88..3fbc2aafcd29 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> @@ -76,8 +76,8 @@ static int amdgpu_ih_clientid_vcns[] = {
> SOC15_IH_CLIENTID_VCN1
> };
>
> -static void vcn_v5_0_0_set_unified_ring_funcs(struct amdgpu_device *adev);
> -static void vcn_v5_0_0_set_irq_funcs(struct amdgpu_device *adev);
> +static void vcn_v5_0_0_set_unified_ring_funcs(struct amdgpu_device *adev, int inst);
> +static void vcn_v5_0_0_set_irq_funcs(struct amdgpu_device *adev, int inst);
> static int vcn_v5_0_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> static int vcn_v5_0_0_pause_dpg_mode(struct amdgpu_device *adev,
> @@ -100,8 +100,8 @@ static int vcn_v5_0_0_early_init(struct amdgpu_ip_block *ip_block)
> /* re-use enc ring as unified ring */
> adev->vcn.num_enc_rings = 1;
>
> - vcn_v5_0_0_set_unified_ring_funcs(adev);
> - vcn_v5_0_0_set_irq_funcs(adev);
> + vcn_v5_0_0_set_unified_ring_funcs(adev, inst);
> + vcn_v5_0_0_set_irq_funcs(adev, inst);
>
> return amdgpu_vcn_early_init(adev, inst);
> }
> @@ -1151,17 +1151,13 @@ static const struct amdgpu_ring_funcs vcn_v5_0_0_unified_ring_vm_funcs = {
> *
> * Set unified ring functions
> */
> -static void vcn_v5_0_0_set_unified_ring_funcs(struct amdgpu_device *adev)
> +static void vcn_v5_0_0_set_unified_ring_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v5_0_0_unified_ring_vm_funcs;
> - adev->vcn.inst[i].ring_enc[0].me = i;
> - }
> + adev->vcn.inst[inst].ring_enc[0].funcs = &vcn_v5_0_0_unified_ring_vm_funcs;
> + adev->vcn.inst[inst].ring_enc[0].me = inst;
> }
>
> /**
> @@ -1326,17 +1322,13 @@ static const struct amdgpu_irq_src_funcs vcn_v5_0_0_irq_funcs = {
> *
> * Set VCN block interrupt irq functions
> */
> -static void vcn_v5_0_0_set_irq_funcs(struct amdgpu_device *adev)
> +static void vcn_v5_0_0_set_irq_funcs(struct amdgpu_device *adev, int inst)
> {
> - int i;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (adev->vcn.harvest_config & (1 << i))
> - continue;
> + if (adev->vcn.harvest_config & (1 << inst))
> + return;
>
> - adev->vcn.inst[i].irq.num_types = adev->vcn.num_enc_rings + 1;
> - adev->vcn.inst[i].irq.funcs = &vcn_v5_0_0_irq_funcs;
> - }
> + adev->vcn.inst[inst].irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.inst[inst].irq.funcs = &vcn_v5_0_0_irq_funcs;
> }
>
> static void vcn_v5_0_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p)
> --
> 2.34.1
>
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