[PATCH] drm/amdgpu: Fix JPEG v4.0.3 register write

[Liu, Leo]

[AMD Official Use Only - AMD Internal Distribution Only]

Acked-by: Leo Liu <leo.liu at amd.com>

> -----Original Message-----
> From: Lazar, Lijo <Lijo.Lazar at amd.com>
> Sent: September 6, 2024 4:46 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Zhang, Hawking <Hawking.Zhang at amd.com>; Deucher, Alexander
> <Alexander.Deucher at amd.com>; Liu, Leo <Leo.Liu at amd.com>; Jian, Jane
> <Jane.Jian at amd.com>; Lu, Victor Cheng Chi (Victor)
> <VictorChengChi.Lu at amd.com>
> Subject: [PATCH] drm/amdgpu: Fix JPEG v4.0.3 register write
>
> EXTERNAL_REG_INTERNAL_OFFSET/EXTERNAL_REG_WRITE_ADDR should be
> used in pairs. If an external register shoudln't be written, both packets
> shouldn't be sent.
>
> Fixes: a78b48146972 ("drm/amdgpu: Skip PCTL0_MMHUB_DEEPSLEEP_IB
> write in
> jpegv4.0.3 under SRIOV")
>
> Signed-off-by: Lijo Lazar <lijo.lazar at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 18 ++++++++++--------
>  1 file changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> index a4ebceaaa09c..8d6a8c66da18 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> @@ -674,11 +674,12 @@ void jpeg_v4_0_3_dec_ring_insert_start(struct
> amdgpu_ring *ring)
>               amdgpu_ring_write(ring,
> PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
>                       0, 0, PACKETJ_TYPE0));
>               amdgpu_ring_write(ring, 0x62a04); /*
> PCTL0_MMHUB_DEEPSLEEP_IB */
> -     }
>
> -     amdgpu_ring_write(ring,
> PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,
> -             0, 0, PACKETJ_TYPE0));
> -     amdgpu_ring_write(ring, 0x80004000);
> +             amdgpu_ring_write(ring,
> +
> PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, 0,
> +                                       0, PACKETJ_TYPE0));
> +             amdgpu_ring_write(ring, 0x80004000);
> +     }
>  }
>
>  /**
> @@ -694,11 +695,12 @@ void jpeg_v4_0_3_dec_ring_insert_end(struct
> amdgpu_ring *ring)
>               amdgpu_ring_write(ring,
> PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
>                       0, 0, PACKETJ_TYPE0));
>               amdgpu_ring_write(ring, 0x62a04);
> -     }
>
> -     amdgpu_ring_write(ring,
> PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,
> -             0, 0, PACKETJ_TYPE0));
> -     amdgpu_ring_write(ring, 0x00004000);
> +             amdgpu_ring_write(ring,
> +
> PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, 0,
> +                                       0, PACKETJ_TYPE0));
> +             amdgpu_ring_write(ring, 0x00004000);
> +     }
>  }
>
>  /**
> --
> 2.25.1