[PATCH] drm/amdgpu: disable GPU RAS bad page feature for specific ASIC
Zhou1, Tao
Tao.Zhou1 at amd.com
Wed Sep 11 02:10:20 UTC 2024
[AMD Official Use Only - AMD Internal Distribution Only]
It's not true, the feature on gpu side is ASIC specific even for APU.
Regards,
Tao
> -----Original Message-----
> From: Lazar, Lijo <Lijo.Lazar at amd.com>
> Sent: Tuesday, September 10, 2024 9:58 PM
> To: Zhou1, Tao <Tao.Zhou1 at amd.com>; amd-gfx at lists.freedesktop.org
> Cc: Zhang, Hawking <Hawking.Zhang at amd.com>
> Subject: Re: [PATCH] drm/amdgpu: disable GPU RAS bad page feature for specific
> ASIC
>
>
> On a second thought, this may be made more generic by just checking APU flag -
> holds true for any APU in general.
>
> Thanks,
> Lijo
>
> On 9/10/2024 7:24 PM, Lazar, Lijo wrote:
> >
> >
> > On 9/10/2024 2:07 PM, Tao Zhou wrote:
> >> The feature is not applicable to specific app platform.
> >>
> >> v2: update the disablement condition and commit description
> >> v3: move the setting to amdgpu_ras_check_supported
> >>
> >> Signed-off-by: Tao Zhou <tao.zhou1 at amd.com>
> >> Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
> >
> > Reviewed-by: Lijo Lazar <lijo.lazar at amd.com>
> >
> > Thanks,
> > Lijo
> >
> >> ---
> >> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 +++++
> >> 1 file changed, 5 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> >> index dbfc41ddc3c7..ebe3e8f01fe2 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> >> @@ -3483,6 +3483,11 @@ static void amdgpu_ras_check_supported(struct
> >> amdgpu_device *adev)
> >>
> >> /* aca is disabled by default */
> >> adev->aca.is_enabled = false;
> >> +
> >> + /* bad page feature is not applicable to specific app platform */
> >> + if (adev->gmc.is_app_apu &&
> >> + amdgpu_ip_version(adev, UMC_HWIP, 0) == IP_VERSION(12, 0, 0))
> >> + amdgpu_bad_page_threshold = 0;
> >> }
> >>
> >> static void amdgpu_ras_counte_dw(struct work_struct *work)
More information about the amd-gfx
mailing list