[PATCH] drm/amdgpu: fix vbios fetching for SR-IOV
Lazar, Lijo
lijo.lazar at amd.com
Thu Sep 26 11:06:10 UTC 2024
On 9/25/2024 11:50 PM, Alex Deucher wrote:
> SR-IOV fetches the vbios from VRAM in some cases.
> Re-enable the VRAM path for dGPUs and rename the function
> to make it clear that it is not IGP specific.
>
> Fixes: 042658d17a54 ("drm/amdgpu: clean up vbios fetching code")
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
> index 46bf623919d7c..45affc02548c1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
> @@ -87,8 +87,9 @@ static bool check_atom_bios(uint8_t *bios, size_t size)
> * part of the system bios. On boot, the system bios puts a
> * copy of the igp rom at the start of vram if a discrete card is
> * present.
> + * For SR-IOV, the vbios image is also put in VRAM in the VF.
> */
> -static bool igp_read_bios_from_vram(struct amdgpu_device *adev)
> +static bool amdgpu_read_bios_from_vram(struct amdgpu_device *adev)
> {
> uint8_t __iomem *bios;
> resource_size_t vram_base;
> @@ -414,7 +415,7 @@ static bool amdgpu_get_bios_apu(struct amdgpu_device *adev)
> goto success;
> }
>
> - if (igp_read_bios_from_vram(adev)) {
> + if (amdgpu_read_bios_from_vram(adev)) {
> dev_info(adev->dev, "Fetched VBIOS from VRAM BAR\n");
> goto success;
> }
> @@ -448,6 +449,12 @@ static bool amdgpu_get_bios_dgpu(struct amdgpu_device *adev)
> goto success;
> }
>
> + /* this is required for SR-IOV */
> + if (amdgpu_read_bios_from_vram(adev)) {
If this is only expected for VFs, then it's better to add
amdgpu_sriov_vf(adev) check for this call.
Thanks,
Lijo
> + dev_info(adev->dev, "Fetched VBIOS from VRAM BAR\n");
> + goto success;
> + }
> +
> if (amdgpu_read_platform_bios(adev)) {
> dev_info(adev->dev, "Fetched VBIOS from platform\n");
> goto success;
More information about the amd-gfx
mailing list