[v3 2/7] drm/amd/amdgpu: Implement SDMA soft reset directly for sdma v5
Alex Deucher
alexdeucher at gmail.com
Mon Apr 7 20:03:20 UTC 2025
On Wed, Apr 2, 2025 at 5:23 AM Jesse.zhang at amd.com <jesse.zhang at amd.com> wrote:
>
> This patch introduces a new function `amdgpu_sdma_soft_reset` to handle SDMA soft resets directly,
> rather than relying on the DPM interface.
>
> 1. **New `amdgpu_sdma_soft_reset` Function**:
> - Implements a soft reset for SDMA engines by directly writing to the hardware registers.
> - Handles SDMA versions 4.x and 5.x separately:
> - For SDMA 4.x, the existing `amdgpu_dpm_reset_sdma` function is used for backward compatibility.
> - For SDMA 5.x, the driver directly manipulates the `GRBM_SOFT_RESET` register to reset the specified SDMA instance.
>
> 2. **Integration into `amdgpu_sdma_reset_engine`**:
> - The `amdgpu_sdma_soft_reset` function is called during the SDMA reset process, replacing the previous call to `amdgpu_dpm_reset_sdma`.
>
> Suggested-by: Alex Deucher <alexander.deucher at amd.com>
> Signed-off-by: Jesse Zhang <jesse.zhang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 46 +++++++++++++++++++++++-
> 1 file changed, 45 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
> index b51fe644940f..26d7c0aca9a8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
> @@ -26,6 +26,8 @@
> #include "amdgpu_sdma.h"
> #include "amdgpu_ras.h"
> #include "amdgpu_reset.h"
> +#include "gc/gc_10_1_0_offset.h"
> +#include "gc/gc_10_3_0_sh_mask.h"
>
> #define AMDGPU_CSA_SDMA_SIZE 64
> /* SDMA CSA reside in the 3rd page of CSA */
> @@ -553,6 +555,48 @@ void amdgpu_sdma_register_on_reset_callbacks(struct amdgpu_device *adev, struct
> list_add_tail(&funcs->list, &adev->sdma.reset_callback_list);
> }
>
> +static int amdgpu_sdma_soft_reset(struct amdgpu_device *adev, u32 instance_id)
> +{
> + u32 soft_reset;
> + int r = 0;
> +
> + switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {
> + case IP_VERSION(4, 4, 2):
> + case IP_VERSION(4, 4, 4):
> + case IP_VERSION(4, 4, 5):
> + /* For SDMA 4.x, use the existing DPM interface for backward compatibility */
> + r = amdgpu_dpm_reset_sdma(adev, 1 << instance_id);
> + break;
> + case IP_VERSION(5, 0, 0):
> + case IP_VERSION(5, 0, 1):
> + case IP_VERSION(5, 0, 2):
> + case IP_VERSION(5, 0, 5):
> + case IP_VERSION(5, 2, 0):
> + case IP_VERSION(5, 2, 2):
> + case IP_VERSION(5, 2, 4):
> + case IP_VERSION(5, 2, 5):
> + case IP_VERSION(5, 2, 6):
> + case IP_VERSION(5, 2, 3):
> + case IP_VERSION(5, 2, 1):
> + case IP_VERSION(5, 2, 7):
> + /* For SDMA 5.x, directly manipulate the GRBM_SOFT_RESET register */
> + soft_reset = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
> + soft_reset |= 1 << GRBM_SOFT_RESET__SOFT_RESET_SDMA0__SHIFT << instance_id;
> + /* Issue the soft reset */
> + WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, soft_reset);
> +
> + udelay(50);
> + /* Clear the soft reset bit */
> + soft_reset &= ~(1 << GRBM_SOFT_RESET__SOFT_RESET_SDMA0__SHIFT << instance_id);
> + WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, soft_reset);
I would move this into a helper function in sdma_v5_0.c and just call
that from here rather than including IP specific programming in this
file. E.g.,
sdma_v5_0_soft_reset(adev, instance_id);
Alex
> + break;
> + default:
> + break;
> + }
> +
> + return r;
> +}
> +
> /**
> * amdgpu_sdma_reset_engine - Reset a specific SDMA engine
> * @adev: Pointer to the AMDGPU device
> @@ -587,7 +631,7 @@ int amdgpu_sdma_reset_engine(struct amdgpu_device *adev, uint32_t instance_id)
> gfx_ring->funcs->stop_queue(gfx_ring);
>
> /* Perform the SDMA reset for the specified instance */
> - ret = amdgpu_dpm_reset_sdma(adev, 1 << instance_id);
> + ret = amdgpu_sdma_soft_reset(adev, instance_id);
> if (ret) {
> dev_err(adev->dev, "Failed to reset SDMA instance %u\n", instance_id);
> goto exit;
> --
> 2.25.1
>
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