[PATCH v1] drm/amdgpu: no need to set queue_active in mes_userq_resume

[Khatri, Sunil]

[AMD Official Use Only - AMD Internal Distribution Only]

I see that you have pushed that before me so please goahead and get it reviewed and merged. I have another change pending which i am waiting for Alex to have a look.

Regards
Sunil

-----Original Message-----
From: Liang, Prike <Prike.Liang at amd.com>
Sent: Tuesday, April 8, 2025 7:24 AM
To: Khatri, Sunil <Sunil.Khatri at amd.com>; Khatri, Sunil <Sunil.Khatri at amd.com>; amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>
Subject: RE: [PATCH v1] drm/amdgpu: no need to set queue_active in mes_userq_resume

[AMD Official Use Only - AMD Internal Distribution Only]

I had a similar patch before, the mes_userq_mqd_destroy() also need to clean up the duplicated queue active bit setting.

Regards,
      Prike

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
> Khatri, Sunil
> Sent: Monday, April 7, 2025 1:59 PM
> To: Khatri, Sunil <Sunil.Khatri at amd.com>;
> amd-gfx at lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian
> <Christian.Koenig at amd.com>
> Subject: Re: [PATCH v1] drm/amdgpu: no need to set queue_active in
> mes_userq_resume
>
> Ping
>
> On 4/2/2025 5:46 PM, Sunil Khatri wrote:
> > In mes_userq_resume calls mes_userq_map which set the queue_active
> > state to true if it succeed and from the resume we dont need to
> > explicitly set the queue state.
> >
> > Signed-off-by: Sunil Khatri <sunil.khatri at amd.com>
> > ---
> >   drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 1 -
> >   1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > index 8f6c12a78f3a..c596e534efbf 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > @@ -382,7 +382,6 @@ static int mes_userq_resume(struct
> amdgpu_userq_mgr *uq_mgr,
> >             return ret;
> >     }
> >
> > -   queue->queue_active = true;
> >     return 0;
> >   }
> >