[PATCH 3/4] drm/sdma6: properly reference trap interrupts for userqs
Khatri, Sunil
sukhatri at amd.com
Mon Apr 14 17:35:19 UTC 2025
On 4/14/2025 9:02 PM, Alex Deucher wrote:
> On Mon, Apr 14, 2025 at 5:59 AM Khatri, Sunil <sukhatri at amd.com> wrote:
>> Same explanation as patch 1 of the series here too. Do we want to depend
>> on the disable_kq flag solely to enable/disable sdma trap.
>> IIUC, we dont want to do it in case of kernel queues at all and only
>> needed when using userqueue and that is taken care by using the flag
>> disable_kq.
> I think doing it this way makes the most sense because you are using
> the presence of user queues to determine whether or not to take the
> extra references. We don't really care what the status of kernel
> queues are.
With the understanding from patch 1. Reviewed-by: Sunil Khatri
<sunil.khatri at amd.com>
Regards
Sunil Khatri
> Alex
>
>> Regards
>> Sunil Khatri
>>
>> On 4/13/2025 9:36 PM, Alex Deucher wrote:
>>> We need to take a reference to the interrupts to make
>>> sure they stay enabled even if the kernel queues have
>>> disabled them.
>>>
>>> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 31 +++++++++++++++++++++++++-
>>> 1 file changed, 30 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
>>> index 2249a1ef057bf..c3d53974e7f53 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
>>> @@ -1377,11 +1377,39 @@ static int sdma_v6_0_sw_fini(struct amdgpu_ip_block *ip_block)
>>> return 0;
>>> }
>>>
>>> +static int sdma_v6_0_set_userq_trap_interrupts(struct amdgpu_device *adev,
>>> + bool enable)
>>> +{
>>> + unsigned int irq_type;
>>> + int i, r;
>>> +
>>> + if (adev->userq_funcs[AMDGPU_HW_IP_DMA]) {
>>> + for (i = 0; i < adev->sdma.num_instances; i++) {
>>> + irq_type = AMDGPU_SDMA_IRQ_INSTANCE0 + i;
>>> + if (enable)
>>> + r = amdgpu_irq_get(adev, &adev->sdma.trap_irq,
>>> + irq_type);
>>> + else
>>> + r = amdgpu_irq_put(adev, &adev->sdma.trap_irq,
>>> + irq_type);
>>> + if (r)
>>> + return r;
>>> + }
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +
>>> static int sdma_v6_0_hw_init(struct amdgpu_ip_block *ip_block)
>>> {
>>> struct amdgpu_device *adev = ip_block->adev;
>>> + int r;
>>>
>>> - return sdma_v6_0_start(adev);
>>> + r = sdma_v6_0_start(adev);
>>> + if (r)
>>> + return r;
>>> +
>>> + return sdma_v6_0_set_userq_trap_interrupts(adev, true);
>>> }
>>>
>>> static int sdma_v6_0_hw_fini(struct amdgpu_ip_block *ip_block)
>>> @@ -1393,6 +1421,7 @@ static int sdma_v6_0_hw_fini(struct amdgpu_ip_block *ip_block)
>>>
>>> sdma_v6_0_ctxempty_int_enable(adev, false);
>>> sdma_v6_0_enable(adev, false);
>>> + sdma_v6_0_set_userq_trap_interrupts(adev, false);
>>>
>>> return 0;
>>> }
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